Metal fill consists of non-functional dummy metal shapes inserted into empty areas of metal routing layers to equalize pattern density — ensuring uniform CMP polishing, consistent etch behavior, and predictable parasitic characteristics across the die.

Purpose of Metal Fill

• CMP Planarity: Without metal fill, regions with sparse routing are over-polished (erosion), while dense regions are under-polished. Metal fill equalizes the effective density, producing a flat surface after CMP.
• Density Compliance: Foundries require each metal layer to have pattern density within a specified range (typically 20–80%) measured over sliding windows. Metal fill brings sparse regions up to minimum density.
• Etch Uniformity: Metal etch processes can exhibit loading effects — uniform density reduces etch rate variation.

Metal Fill Characteristics

• Shape: Typically small rectangles or squares, sized and spaced according to design rules. Common sizes: 0.5–2 µm.
• Pattern: Regular arrays, staggered arrays, or density-optimized patterns that smoothly transition between different density regions.
• Connectivity: Floating (unconnected), grounded (connected to VSS), or connected to a dedicated fill net.
• Layer: Applied to every metal layer independently — each layer has its own density requirements.

Impact on Circuit Performance

• Added Capacitance: Metal fill shapes near signal wires add parasitic capacitance — typically 2–10% increase in wire capacitance.
• Timing Impact: The additional capacitance can affect signal delay. For critical nets, fill is either excluded or its impact is included in parasitic extraction.
• Crosstalk: Fill shapes can act as intermediate coupling paths between signal wires, though this effect is usually small.

Metal Fill Strategies

• Rule-Based Fill: Insert fill shapes wherever they fit while satisfying spacing rules. Simplest and fastest.
• Density-Target Fill: Optimize fill placement to achieve a specific target density (e.g., 50%) uniformly across the die.
• Timing-Driven Fill: Account for capacitive impact — reduce fill near timing-critical nets or increase spacing to critical wires.
• Grounded Fill: Connect fill to ground for better noise shielding and elimination of floating-node effects — but requires ground routing to fill regions.
• Cheesing/Slotting: For wide metal features (power straps), insert holes or slots within the metal to reduce effective width and improve CMP uniformity — this is the inverse of fill (removing metal from dense areas).

Metal Fill in Practice

• Inserted automatically by EDA tools (Calibre, IC Validator) as one of the final post-route steps.
• After fill insertion: Re-extract parasitics (including fill capacitance) and re-verify timing to ensure no violations were introduced.
• Fill shapes are included in the final GDS/OASIS tapeout data sent to the foundry.

Metal fill is a non-negotiable manufacturing requirement — it is one of the most routine yet impactful steps in preparing a design for fabrication.