Microprobing is a failure analysis technique that uses precision needle probes to physically contact internal circuit nodes of integrated circuits â enabling direct electrical measurement of voltages, currents, and waveforms at specific transistors, metal interconnect lines, and vias that are otherwise inaccessible through the chip's external pins, serving as the definitive method for isolating and diagnosing electrical failures in complex semiconductor devices.
What Is Microprobing?
- Definition: The practice of landing ultra-fine tungsten or platinum-iridium probe tips (tip radius <1Ξm) on exposed metal lines, pads, or device terminals within an integrated circuit while applying stimuli and measuring electrical responses through a probe station equipped with micromanipulators, microscopes, and measurement instruments.
- The Problem: A chip has billions of transistors but only hundreds of external I/O pins. When the chip fails, external testing can identify THAT it fails but not WHERE internally the failure occurs. Microprobing physically accesses the internal nodes to locate the exact failure site.
- The Scale: Modern probe tips can contact metal lines as narrow as 100nm, though accessing buried layers requires careful delayering (etching away overlying layers) to expose the target metal level.
Microprobing Station Components
| Component | Function | Specifications |
|-----------|---------|---------------|
| Probe Station | Mechanical platform with temperature control (-60°C to +300°C) | Vibration-isolated, shielded enclosure |
| Micromanipulators | Position probe tips with sub-micron precision | 3-axis + rotation, manual or piezoelectric |
| Probe Tips | Make electrical contact to circuit nodes | Tungsten (standard) or PtIr (low contact resistance) |
| Microscope | Visualize probe landing and circuit features | Optical (20-100Ã) + optional SEM for finest features |
| Source-Measure Unit (SMU) | Apply voltage/current and measure response | Keithley 4200, fA sensitivity |
| Oscilloscope | Capture time-domain waveforms | High-bandwidth for signal integrity analysis |
| Pattern Generator | Provide stimulus patterns to chip | Required for dynamic probing |
Microprobing Techniques
| Technique | What It Does | Detects |
|-----------|-------------|---------|
| DC Probing | Measure static voltage/current at a node | Shorted or open interconnects, incorrect bias |
| AC/Dynamic Probing | Capture waveforms while chip operates | Timing failures, signal integrity issues |
| Voltage Contrast | SEM imaging of probed node â voltage affects secondary electron yield | Floating nodes, shorts to power/ground |
| I-V Characterization | Sweep voltage, measure current at a junction | Transistor degradation, gate oxide breakdown |
| Nanoprobing | SEM-based probing with nm-precision manipulators | Individual transistor characterization at advanced nodes |
| EBAC/EBIC | Electron-beam absorbed/induced current | Junction locations, current leakage paths |
Failure Analysis Workflow with Microprobing
| Step | Action | Purpose |
|------|--------|---------|
| 1. Fault Isolation | Narrow failure to a region using scan chain, IDDQ, thermal imaging | Reduce probing search area |
| 2. Delayering | Remove overlying passivation and metal layers to expose target level | Access buried interconnects |
| 3. Probe Landing | Land probes on target metal lines or device terminals | Establish electrical contact |
| 4. Stimulus + Measurement | Apply signals, measure responses | Characterize failure electrically |
| 5. Root Cause | Compare measurements to design expectations | Identify the defective element |
| 6. Physical Analysis | Cross-section the failure site with FIB-SEM | Confirm physical defect mechanism |
Microprobing is the definitive electrical debug technique for semiconductor failure analysis â enabling direct access to internal circuit nodes that are invisible through external testing, using precision probe tips and sensitive measurement instruments to isolate the exact location and electrical signature of failures in complex integrated circuits, from individual transistor defects to interconnect opens and shorts.