Model quantization reduces the numerical precision used to store or compute neural-network weights and activations. Moving FP32 models to FP16, BF16, FP8, INT8, INT4, or mixed formats cuts memory, bandwidth, energy, and latency and often determines whether a model fits the deployment hardware. Integer inference became standard for edge CNNs; transformer deployment expanded weight-only methods such as GPTQ and AWQ, activation-aware schemes such as SmoothQuant, and FP8 training and inference. A production definition states the tensor shapes, training and inference phases, numerical precision, reduction axes, masking rules, parameterization, initialization, and interaction with normalization, optimization, and parallel execution. The same name can hide materially different semantics across frameworks, so equations, defaults, and edge cases belong in the model contract. A complete specification names weight and activation formats, granularity, symmetric or asymmetric mapping, scale and zero point, calibration data, rounding, clipping, accumulator width, excluded operations, and target kernels.
Architecture, mathematics, and operating behavior. Quantization maps real values to a finite codebook. Per-tensor scaling is simple, per-channel or per-group scaling tracks distribution variation, static activation scales use calibration, and dynamic schemes compute scales at runtime. Weight-only quantization reduces model traffic while leaving activations in floating point. PTQ calibrates or optimizes a trained model without full retraining; QAT inserts fake quantization during training so weights adapt; GPTQ uses approximate second-order information layer by layer; AWQ protects salient weight channels based on activation statistics; SmoothQuant shifts difficulty from activations into weights. INT8 offers broad hardware support and modest risk, FP8 preserves floating dynamic range for modern accelerators, INT4 yields stronger compression with greater sensitivity, and binary or ternary methods need specialized training and kernels. KV-cache quantization separately targets autoregressive serving memory. Modern networks are graphs rather than simple stacks. Activations, gradients, optimizer state, random-number state, masks, cached tensors, and collective operations cross layer and device boundaries. A local mathematical choice therefore changes memory lifetime, compiler fusion, communication, checkpoint compatibility, and sometimes the function represented by the complete model. Evaluation keeps task quality beside training loss, calibration, convergence speed, gradient statistics, activation range, sensitivity to seeds, robustness, throughput, latency, peak memory, communication, energy, and cost. Controlled comparisons hold data order, augmentation, tokenizer, parameter count, optimizer budget, and evaluation protocol fixed; otherwise an apparent component improvement may simply spend more compute or change regularization.
Implementation, hardware mapping, and failure modes. Graph preparation folds eligible batch normalization, chooses observers, collects representative calibration ranges, converts operators, packs weights, emits scale metadata, selects supported kernels, and evaluates accuracy. Outlier channels may remain at higher precision and sensitive layers such as embeddings or output heads may be excluded. Tensor cores, dot-product units, SIMD instructions, NPUs, and DSPs accelerate supported low-precision shapes; actual speedup depends on kernel availability, packing, dequantization, accumulator behavior, memory bandwidth, batch size, and whether fallback operators break fusion. Unrepresentative calibration clips rare values, activation outliers waste codes, small groups add metadata and overhead, accumulator overflow corrupts sums, unsupported layers fall back slowly, rounding bias shifts logits, and nominal INT4 files may dequantize to FP16 before computation. Implementation begins with a small reference in full precision, explicit shapes, deterministic seeds, and analytic edge cases. Production kernels then add vectorization, mixed precision, fusion, recomputation, sharding, and layout changes. Stable reductions use appropriate accumulation precision, masks are applied before normalization where required, and distributed replicas agree on scaling and averaging semantics. GPUs and AI accelerators favor dense matrix multiplication, contiguous tiles, predictable reductions, and high arithmetic intensity. HBM traffic, cache locality, tensor-core alignment, kernel-launch overhead, collective latency, host-device synchronization, and temporary workspace often dominate a theoretically cheap operation. Profiling must use target batch, sequence, channel, and sparsity distributions rather than a convenient microbenchmark. Common failures include silent broadcasting, an incorrect axis, train-versus-eval mismatch, stale masks, in-place autograd corruption, overflow or underflow, nondeterministic reductions, incompatible checkpoint shapes, duplicated scaling across ranks, and metrics averaged with the wrong denominator. A numerically plausible loss curve does not prove semantic correctness.
Evaluation, debugging, and lifecycle controls. Compare layer outputs against a floating reference, sweep calibration sets and clipping percentiles, inspect saturation and scale histograms, test rare and safety-critical slices, evaluate perplexity and downstream tasks, and profile target kernels rather than file size alone. Report bits per weight, effective bytes including scales, peak memory, KV cache, throughput, first-token and inter-token latency, energy, task quality, calibration error, saturation rate, and hardware coverage. Layerwise error, sensitivity analysis, selective precision rollback, and accumulator tests isolate where quantization noise becomes unacceptable. Verification combines unit tests against a trusted formula, finite-difference or directional gradient checks, shape and dtype properties, extreme-value tests, CPU-versus-accelerator comparisons, eager-versus-compiled parity, mixed-precision tolerances, distributed equivalence, checkpoint round trips, ablations, repeated seeds, and end-to-end quality and performance measurements. Configuration, source revision, dataset and tokenizer versions, seed, compiler and kernel build, hardware topology, checkpoint, evaluation artifact, and deployment policy remain linked. Telemetry detects drift in losses, norms, activation distributions, latency, memory, and data slices; staged rollout and reversible artifacts make a bad optimization recoverable. Teams document assumptions, intended use, benchmark scope, numerical tolerances, known failure modes, dataset provenance, access controls, dependency and checkpoint integrity, and responsible owners. Reproducibility and traceability matter because small training changes can alter subgroup behavior, safety evaluation, and downstream operating thresholds.
| Method | Training need | Calibration/data | Strength | Primary limitation |
|---|---|---|---|---|
| PTQ | No full retraining | Representative calibration | Fast general conversion | Outlier sensitivity |
| QAT | Fine-tune/train | Training examples | Best low-bit adaptation | Compute and pipeline cost |
| GPTQ | Layerwise optimization | Small calibration set | Strong LLM weight-only INT4 | Offline quantization cost |
| AWQ | Activation-aware search | Calibration activations | Protects salient channels | Kernel/layout dependency |
| SmoothQuant | Scale migration | Activation statistics | Improves W8A8 transformers | Tuning and graph changes |
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<text x="380" y="28" fill="#e6edf3" font-size="21" font-weight="700" text-anchor="middle">Model Quantization Technical Microarchitecture</text>
<text x="380" y="48" fill="#8b98a5" font-size="12" text-anchor="middle">Detailed Domain Pipeline, Architectural Blocks & Engineering Performance Optimization (ID 10874)</text>
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<text x="380" y="430" fill="#fbbf24" font-size="9" font-weight="700" text-anchor="middle">Key Insight: Optimal Model Quantization architecture balances performance throughput, systemic latency, and physical constraints.</text>
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Selection and practical application. Start with BF16 or FP16 baseline, use INT8 for robust general acceleration, FP8 where hardware supports it, and calibrated INT4 weight-only methods for bandwidth-bound LLM serving; choose QAT when PTQ misses the quality target and retraining is feasible. Mobile vision, speech, recommender inference, edge sensing, datacenter LLM serving, generative image models, robotics, and embedded control use quantized models. Quantization is co-designed with pruning, distillation, compiler lowering, tensor parallelism, batching, cache format, memory capacity, power, and latency service levels. The useful unit of analysis is the complete training and serving system: data loader, model graph, loss, optimizer, learning-rate schedule, precision policy, distributed runtime, compiler, accelerator, checkpoint store, evaluator, and inference engine. Improving one component can move a bottleneck or alter statistical behavior elsewhere. A production definition states the tensor shapes, training and inference phases, numerical precision, reduction axes, masking rules, parameterization, initialization, and interaction with normalization, optimization, and parallel execution. The same name can hide materially different semantics across frameworks, so equations, defaults, and edge cases belong in the model contract. Evaluation keeps task quality beside training loss, calibration, convergence speed, gradient statistics, activation range, sensitivity to seeds, robustness, throughput, latency, peak memory, communication, energy, and cost. Controlled comparisons hold data order, augmentation, tokenizer, parameter count, optimizer budget, and evaluation protocol fixed; otherwise an apparent component improvement may simply spend more compute or change regularization. CFS connects this topic to semiconductor architecture, implementation, verification, manufacturing, packaging, test, and deployed AI-system tradeoffs across the platform.
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