Moore's Law is the observation by Gordon Moore (1965) that the number of transistors on integrated circuits doubles approximately every two years, driving the semiconductor industry's roadmap for decades. Original paper: Moore observed component count doubling annually, later revised to every two years (1975). Mechanism: achieved through dimensional scaling—smaller transistors, thinner oxides, finer lithography—enabling more transistors in same area. Historical validation: transistor counts grew from ~2,300 (Intel 4004, 1971) to >100 billion (modern GPUs/accelerators). Scaling enablers by era: (1) Dennard scaling era (1970s-2005)—voltage and dimensions scaled together; (2) FinFET era (2012-present)—3D transistor structure continued density scaling; (3) EUV era (2019-present)—shorter wavelength enabled finer patterning; (4) GAA/nanosheet era (2024+)—gate-all-around transistors for continued scaling. Economic dimension: Moore's second law—fab construction cost doubles every ~4 years (now $20B+ for leading edge). Current status: transistor density scaling continues but pace slowing; cost per transistor no longer decreasing at historical rate. Challenges: physical limits (atomic scale features), power density limits, lithography complexity, design complexity, exponential cost increases. Beyond Moore: (1) More-than-Moore—integrate diverse functions (sensors, RF, power); (2) Heterogeneous integration—chiplet-based scaling; (3) New compute paradigms—neuromorphic, quantum. Industry impact: Moore's Law drove ~$600B semiconductor industry, transformed computing, communications, and virtually every aspect of modern life. While pure dimensional scaling approaches physical limits, innovation continues through architectural and integration advances.