Neuromorphic Semiconductor Devices are specialized hardware substrates implementing brain-inspired computing via memristor/resistive/ferroelectric synaptic elements integrated into crossbar arrays for ultra-efficient spiking neural network inference.

Synaptic Device Technologies:

• Memristor (resistive switching RRAM): resistance state encodes synaptic weight, accessed via 1T1R or passive crossbar
• Phase-change synaptic cells (GST, Ge₂Sb₂Te₅): crystalline vs amorphous states for multi-level weights
• Ferroelectric tunnel junctions (FTJ): polarization state controls electron tunneling probability
• RRAM crossbar arrays: dot-product computation via Ohm's law + Kirchhoff's law at array scale

Device Physics and Challenges:

• Synaptic weight variability mimics biological stochasticity but creates device-level uncertainty
• Retention time vs endurance tradeoff: longer data persistence reduces write cycles available
• Switching dynamics: volatile (RRAM file) vs non-volatile (phase-change) behavior
• Multi-level cell (MLC) programming: distributing resistance states across conductance range

Neuromorphic Architectures:

• Intel Loihi 2: 128 neuromorphic cores, spike-event driven, 10 pJ/synaptic operation
• IBM NorthPole: in-memory computing for SNNs, demonstrating pJ/operation energy
• Analog in-memory computing: crossbar array multiplication via voltage/current physics
• Spike-driven operation: asynchronous, event-based (no clock)

Reliability and Scaling: Neuromorphic devices trade precision/determinism for energy efficiency—suitable for inference tolerant to noise. Manufacturing yield remains challenging; analog device variability requires either calibration networks or noise-robust training methods to maintain accuracy.