Security in Parallel Computing is the emerging discipline addressing the unique attack surfaces introduced by shared parallel hardware — where multiple tenants sharing GPU compute, CPU caches, DRAM rows, and network fabrics create side-channel leakage opportunities that allow one tenant to infer sensitive information about another's computation, requiring architectural mitigations and secure programming practices that often conflict with maximum performance.

Shared Hardware Attack Surfaces

• Shared LLC (Last-Level Cache): cache timing attacks (Prime+Probe, Flush+Reload) allow a co-located attacker to monitor cache access patterns of a victim, inferring cryptographic keys or private data.
• DRAM Row Hammer: repeated access to DRAM rows induces bit flips in adjacent rows, enabling privilege escalation or data corruption across VM boundaries.
• GPU Shared Resources: GPU L2 cache timing, memory bus contention, and power consumption are observable by co-tenant processes, leaking information about ML model architectures or input data.
• Network Contention: measuring response latency reveals information about co-tenant traffic patterns.

Spectre and Meltdown in HPC

Spectre exploits speculative execution: trick the CPU into speculatively accessing out-of-bounds memory, leak data through cache timing side channel. Meltdown exploits privilege bypass in speculative execution. Patches (KPTI, retpoline) add 5-30% overhead — significant in HPC. Cloud HPC providers must patch, impacting all tenants.

Secure Multi-Party Computation (MPC)

• Homomorphic Encryption (HE): compute on encrypted data (BFV, BGV, CKKS schemes), no decryption needed. 100x-10000x overhead vs plaintext. GPU acceleration (cuFHE, SEAL-GPU) reduces overhead.
• Garbled Circuits: two-party secure computation where function is represented as boolean circuit garbled by one party. O(|circuit|) communication overhead.
• Secret Sharing (SPDZ): secret split across parties, compute on shares without learning secret. Used in federated learning.

Confidential Computing in Cloud HPC

• AMD SEV (Secure Encrypted Virtualization): VM memory encrypted with per-VM key inaccessible to hypervisor, SEV-SNP adds integrity protection.
• Intel TDX (Trust Domain Extensions): hardware-isolated VMs (Trust Domains) with encrypted memory, remote attestation.
• ARM CCA (Confidential Compute Architecture): realm VMs for cloud.
• Performance overhead: 5-15% for memory encryption.

GPU Security Challenges

• GPU VRAM not cleared between processes by default (historical): risk of data leakage. Modern drivers zero GPU memory on process exit.
• GPU SM context isolation: NVIDIA MIG (Multi-Instance GPU) provides hardware isolation between tenants.
• GPU-side-channel research: power side channel (RAPL for CPU, NVML for GPU power) can leak model weights.

Security in Parallel Computing is the critical but underappreciated discipline ensuring that performance-driven architectural features — speculation, caching, memory sharing — do not become pathways for information leakage, requiring the HPC and security communities to collaborate on architectures that are simultaneously fast, scalable, and provably isolated.