BPSG and PSG Dielectrics are the doped silicon oxide insulating films used as interlayer dielectrics and planarization layers in CMOS fabrication — where the addition of boron and phosphorus to SiO2 lowers the glass transition temperature, enabling thermal reflow to create smooth, planarized surfaces over topographic steps, and provides gettering capability to trap mobile ion contaminants that would otherwise degrade transistor reliability.
Film Types and Composition
| Film | Dopants | Typical Composition | Reflow Temp |
|---|---|---|---|
| USG (Undoped Silicate Glass) | None | SiO2 | No reflow |
| PSG (Phosphosilicate Glass) | Phosphorus | 4-8 wt% P | ~1000-1100°C |
| BSG (Borosilicate Glass) | Boron | 3-6 wt% B | ~850-950°C |
| BPSG (Borophosphosilicate Glass) | Both B + P | 4% B + 5% P | ~800-900°C |
Why BPSG?
- Reflow: At 800-950°C, BPSG softens and flows — fills gaps, rounds sharp corners, planarizes surface.
- Gettering: Phosphorus traps mobile ions (Na+, K+) — prevents contamination from reaching gate oxide.
- Etch rate: B and P increase HF etch rate — enables selective etching for contact formation.
- Stress relief: BPSG has lower internal stress than dense LPCVD SiO2.
Reflow Planarization
- Before CMP was widely adopted (< 180nm), BPSG reflow was the primary planarization method.
- Process: Deposit BPSG over topographic features → anneal at 850°C → glass flows, surface smooths.
- Limitation: Reflow only works over small topography — doesn't fully planarize over large features.
- At advanced nodes: CMP replaced reflow for global planarization, but BPSG still used for gap fill.
Deposition Methods
- SACVD (Sub-Atmospheric CVD): TEOS + O3 + TMP/TMB → BPSG at 400-500°C.
- LPCVD: SiH4 + PH3 + B2H6 + O2 → BPSG at 350-450°C.
- PECVD: Plasma-assisted at 300-400°C — lower thermal budget.
Dopant Concentration Control
- Too much B (> 6%): Film becomes hygroscopic — absorbs moisture → reliability issue.
- Too much P (> 8%): Film becomes acidic — attacks aluminum metallization.
- B + P total: Typically 8-12 wt% total for optimal reflow and stability.
- Measurement: FTIR (Fourier Transform Infrared Spectroscopy) monitors B and P content inline.
Current Usage (Advanced Nodes)
- BPSG less common at < 28nm: Low thermal budgets preclude high-temperature reflow.
- Still used in: DRAM (capacitor dielectric), image sensors, analog/power devices.
- PSG (without B): Used as sacrificial layer and getter in some FEOL modules.
- Legacy but important: Understanding BPSG is essential for maintaining mature node production.
BPSG and PSG dielectrics are foundational materials in semiconductor fabrication history — while CMP has replaced reflow as the primary planarization technique, the gettering capability and gap-fill properties of doped oxide glasses continue to serve important roles in specific device applications and mature technology nodes.
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