Photolithography — using light to transfer circuit patterns onto a silicon wafer, the core patterning technology in semiconductor manufacturing.
Process Steps
1. Coat: Spin photoresist (light-sensitive polymer) onto wafer
2. Expose: Project mask pattern onto resist using UV light through a lens system (reduction stepper/scanner)
3. Develop: Dissolve exposed (positive resist) or unexposed (negative resist) areas
4. Etch/Implant: Use remaining resist as a mask for etching or ion implantation
5. Strip: Remove remaining photoresist
Resolution Limit
- Rayleigh criterion: $R = k_1 \lambda / NA$
- $\lambda$: Light wavelength. DUV (193nm), EUV (13.5nm)
- NA: Numerical aperture (0.33 for EUV, 1.35 for immersion DUV)
Technology Generations
- g-line/i-line (436/365nm): Legacy nodes > 250nm
- DUV (248nm, 193nm): Workhorse for 180nm-7nm with multi-patterning
- EUV (13.5nm): Required for 7nm and below. Single exposure replaces quad patterning
- High-NA EUV: 0.55 NA for 2nm and beyond (ASML EXE:5000)
Photolithography is the most critical and expensive step in chip manufacturing — a single EUV scanner costs $350M+.