Probe yield is the percentage of die on a wafer passing electrical test before packaging — the first electrical quality gate, typically 70-95%, with failures indicating wafer fabrication defects that must be fixed to improve overall yield and profitability.

What Is Probe Yield?

• Definition: (Good die / Total die) × 100% at wafer probe.
• Timing: First electrical test, before dicing and packaging.
• Typical: 70-95% depending on maturity and complexity.
• Impact: Directly determines how many die can be packaged.

Why Probe Yield Matters

• Cost Gate: Avoid packaging bad die (saves assembly cost).
• Fab Health: Primary indicator of wafer fabrication quality.
• Revenue: Higher probe yield means more sellable devices per wafer.
• Learning: Wafer maps reveal systematic defect patterns.

Yield Loss Sources

• Random Defects: Particles, contamination (uniform across wafer).
• Systematic Defects: Process issues (patterned on wafer map).
• Edge Die: Lower yield at wafer edge.
• Design Issues: Marginality in circuit design.

Wafer Mapping: Visual representation of pass/fail die reveals defect patterns (edge effects, radial patterns, clusters) guiding root cause analysis.

Probe yield is the fab report card — directly measuring wafer fabrication quality and determining how many devices can proceed to packaging and sale.