Superconducting qubits and transmon architectures constitute the premier solid-state quantum computing platform fabricated using semiconductor cleanroom techniques on high-resistivity silicon and sapphire substrates. Operating at millikelvin temperatures ($T < 15\text{ mK}$) inside dilution refrigerators, a transmon qubit functions as an anharmonic quantum electromagnetic oscillator where a sub-micron Aluminum/Aluminum Oxide/Aluminum Josephson tunnel junction provides non-dissipative non-linear inductance. By shunting the junction with a large planar capacitor to operate in the high Josephson-to-charging energy regime ($E_J / E_C \gg 1$), transmons exponentially suppress low-frequency charge noise while retaining sufficient anharmonicity to isolate a computational two-level subspace ($|0\rangle, |1\rangle$). Qubit coherence times ($T_1, T_2^*$) are primarily limited by two-level system dielectric loss at material interfaces, requiring rigorous surface engineering and cryogenic microwave control.

The transmon Hamiltonian operates in the large Josephson-to-charging energy ratio regime to eliminate charge noise. The fundamental quantum Hamiltonian of a single-junction Cooper Pair Box is formulated as:

Here, $E_C = e^2 / (2 C_{\Sigma})$ is the single-electron charging energy, $\hat{n}$ is the Cooper pair number operator, $n_g = C_g V_g / (2e)$ is the dimensionless offset gate charge, $E_J = I_c \Phi_0 / (2\pi)$ is the Josephson coupling energy ($I_c$ is junction critical current and $\Phi_0 = h/2e$ is the magnetic flux quantum), and $\hat{\phi}$ is the superconducting phase operator across the junction. By adding a large shunting capacitor ($C_B \gg C_J$) to establish $E_J / E_C \approx 50\text{--}80$, the charge dispersion of qubit energy levels decays exponentially ($\Delta \epsilon_m \propto (-1)^m (E_J/E_C)^{m/2 + 1/4} \exp[-\sqrt{8 E_J / E_C}]$), completely immunizing the qubit against ambient $1/f$ charge noise.

Sub-micron Dolan bridge shadow evaporation defines reproducible Josephson tunnel barriers. The essential non-linear element—the Josephson junction—is fabricated using electron-beam lithography on a bilayer resist stack (MMA/PMMA) to create a free-hanging resist bridge (the "Dolan bridge"). In an ultra-high-vacuum deposition tool ($P < 10^{-9}\text{ Torr}$), a first layer of high-purity Aluminum ($t_1 \approx 20\text{--}30\text{ nm}$) is deposited at angle $+\theta$. Pure oxygen ($\text{O}_2$) is introduced for controlled thermal oxidation ($P_{\text{O}_2} \approx 0.1\text{--}10\text{ mbar}$ for $5\text{--}30\text{ min}$) to form an amorphous $\text{AlO}_x$ tunnel barrier ($t_{\text{ox}} \approx 1.0\text{--}1.5\text{ nm}$). A second Aluminum layer ($t_2 \approx 40\text{--}60\text{ nm}$) is evaporated at angle $-\theta$, creating a sub-micron overlap area ($A \approx 0.01\text{--}0.05\ \mu\text{m}^2$) with critical current densities of $J_c \approx 0.1\text{--}1.0\ \mu\text{A}/\mu\text{m}^2$ governed by the Ambegaokar-Baratoff relation ($I_c R_n = \pi \Delta(0) / [2e]$).

Two-level system dielectric loss at material interfaces governs qubit relaxation lifetimes. The energy relaxation time ($T_1$) of a transmon is primarily limited by capacitive coupling to resonant microscopic defect dipoles (Two-Level Systems, TLS) distributed across three critical interfaces: the metal-air native oxide on top of superconducting electrodes, the substrate-air contamination on exposed silicon or sapphire, and the metal-substrate interface beneath deposited films. Transitioning from polycrystalline niobium to ultra-smooth epitaxial $\alpha$-tantalum ($\text{Ta}$) base layers combined with specialized buffered oxide etching and in-situ high-vacuum annealing suppresses TLS loss, elevating intrinsic quality factors ($Q_i > 2\times 10^6$) and extending qubit coherence times beyond $T_1 > 300\ \mu\text{s}$.

Dispersive circuit quantum electrodynamics enables non-destructive quantum state readout. Transmon qubits are capacitively coupled to on-chip superconducting coplanar waveguide (CPW) transmission line resonators. When the detuning between the qubit frequency ($\omega_{01}$) and resonator frequency ($\omega_r$) is large ($|\Delta| = |\omega_{01} - \omega_r| \gg g$), the system operates in the dispersive regime ($H_{\text{disp}} \approx \hbar(\omega_r + \chi \hat{\sigma}_z) a^\dagger a$). The state of the qubit ($|0\rangle$ or $|1\rangle$) shifts the fundamental resonant frequency of the readout resonator by $\pm\chi$. By interrogating the resonator with a weak microwave probe tone and measuring the transmitted amplitude and phase shift via cryogenic High Electron Mobility Transistor (HEMT) and Traveling Wave Parametric Amplifiers (TWPA), the quantum state is resolved within sub-microsecond timescales.

st=>start: Clean high-resistivity silicon wafer (rho > 10,000 Ohm-cm); deposit Ta/Nb base film
base_pattern=>operation: Pattern coplanar waveguide readout resonators and qubit shunt capacitors via RIE
dolan_litho=>operation: Expose Dolan bridge junction patterns via high-resolution 100kV electron-beam lithography
shadow_evap=>operation: Execute double-angle Al evaporation with in-situ controlled thermal AlOx oxidation
wafer_dicing=>operation: Dice wafer; mount chip in gold-plated oxygen-free high-conductivity (OFHC) copper pack
fridge_cooldown=>operation: Cool dilution refrigerator to 10 mK; initialize cryogenic microwave attenuation lines
tune_qubit=>operation: Execute Ramsey and Rabi pulse calibration; measure T1 relaxation and T2* dephasing
pass=>end: Calibrated transmon achieves gate fidelity > 99.9% with coherence times T1, T2* > 150us
st->base_pattern->dolan_litho->shadow_evap->wafer_dicing->fridge_cooldown->tune_qubit->pass

Scaling quantum computing processors to fault-tolerant multi-qubit architectures requires viewing device physics through a transmon-josephson-dolan-anharmonicity-and-tls-dielectric-loss lens. By uniting quantum non-linear Hamiltonian mechanics, Dolan bridge shadow evaporation metallurgy, two-level system interface mitigation, dispersive microwave readout, and cryogenic CMOS control interfaces, quantum foundries construct coherent quantum processors. Mastering superconducting nanofabrication ensures that quantum processing units deliver the extreme gate fidelities and millisecond coherence times essential for quantum error correction and useful quantum supremacy.