Rapid Thermal Processing (RTP) and Advanced Annealing is the high-temperature, short-duration thermal treatment used to activate implanted dopants, repair crystal damage, grow thin oxides, and form silicides — where the fundamental challenge is maximizing the peak temperature (for complete dopant activation) while minimizing the thermal budget (time at temperature) to prevent unwanted dopant diffusion that would broaden ultra-shallow junctions beyond their design specifications.

The Diffusion-Activation Tradeoff

Dopant activation requires high temperature — boron in silicon needs >900°C for substantial electrical activation. But diffusion also increases exponentially with temperature. At advanced nodes, the source/drain extension junction depth must be <7 nm — a single extra second at 1050°C can diffuse boron 2-3 nm, destroying the junction abruptness. The entire art of advanced annealing is maximizing the Tpeak while minimizing the duration.

Annealing Techniques (in order of decreasing thermal budget)

• Furnace Anneal: 800-1000°C for 30-60 minutes. Used only for non-critical steps (BPSG reflow, long-range diffusion). Excessive diffusion for junction formation.
• Rapid Thermal Anneal (RTA): Halogen lamp heating to 900-1100°C with ramp rates of 50-200°C/s. Soak times of 1-30 seconds. The workhorse anneal for 65nm and above.
• Spike RTA: Same lamp heating but with zero soak — the wafer ramps to peak temperature (~1050°C) and immediately begins cooling. Ramp rates of 200-300°C/s. Effective dwell time at peak is ~1 second. Standard for 45nm-14nm junction activation.
• Flash Lamp Anneal (FLA): A bank of xenon flash lamps delivers a millisecond pulse of energy to the wafer surface. The top ~10 um of silicon reaches 1200-1350°C for 0.5-3 ms while the bulk wafer remains at ~500°C (preheated by a separate lamp). Dopant activation occurs in the hot surface layer; diffusion is negligible because the time at temperature is too short.
• Laser Spike Anneal (LSA): A scanned CO2 or diode laser beam heats a narrow strip of the wafer surface to 1200-1400°C for 0.1-1 ms as it scans across the wafer. Achieves the highest peak temperature with the shortest duration, maximizing activation while limiting diffusion to <0.5 nm. Used at 10nm and below.

Activation vs. Diffusion Performance

Process Integration Challenges

• Pattern Effects: Dark and reflective areas on the wafer absorb laser/flash energy differently, creating temperature non-uniformity. Dummy fill patterns and absorber coatings mitigate this.
• Wafer Stress: Rapid heating of the wafer surface while the back remains cool creates extreme thermal gradients (~10⁶ °C/m) and stress. Wafer slip (crystallographic defect lines) can occur if the stress exceeds the yield strength.

Rapid Thermal Processing is the thermal balancing act that activates dopants without letting them diffuse — pushing peak temperatures ever higher and durations ever shorter to maintain junction control at the atomic scale.