Photomask (reticle) is a quartz plate containing the circuit pattern that is transferred to silicon wafers during lithography — the master template that defines every transistor, wire, and via on a chip, requiring defect-free perfection because any mask error is replicated on every wafer exposed through it.

What Is a Photomask?

• Definition: A flat, transparent fused-silica (quartz) plate with an opaque chrome pattern on one surface that selectively blocks UV light during photolithography.
• Reticle vs. Mask: In modern lithography, "reticle" typically refers to a 4x or 5x magnified version of the chip pattern that is optically reduced during exposure. The terms are often used interchangeably.
• Size: Standard reticle is 6" × 6" × 0.25" (152mm × 152mm × 6.35mm) quartz substrate.
• Layers: A single chip design requires 30-80+ different masks, one for each lithography layer.

Why Photomasks Matter

• Pattern Fidelity: The mask defines the physical layout of the chip — any defect on the mask prints on every wafer, potentially ruining thousands of chips.
• Cost: A full mask set for an advanced node (3-5nm) costs $10-20 million. Even mature nodes (28-65nm) cost $500K-2M per set.
• Lead Time: Mask fabrication takes 2-8 weeks, making it a critical-path item in chip development schedules.
• Resolution Limit: Mask quality and resolution enhancement techniques (OPC, PSM) determine the smallest features achievable on wafer.

Mask Types

• Binary Mask: Simple chrome-on-glass — opaque chrome blocks light, clear areas transmit. Used for non-critical layers.
• Phase-Shift Mask (PSM): Etched quartz regions shift light phase by 180°, improving resolution through destructive interference at pattern edges.
• Attenuated PSM: Semi-transparent regions (typically MoSi) transmit 6-15% of light with 180° phase shift — standard for critical layers.
• EUV Masks: Reflective multilayer mirrors (40 pairs of Mo/Si) with absorber pattern — fundamentally different from transmissive DUV masks.

Mask Manufacturing Process

• Blank Preparation: Ultra-flat quartz substrate coated with chrome and photoresist.
• Pattern Writing: Electron-beam lithography writes the design with sub-nanometer precision — takes 8-24 hours for a complex mask.
• Development and Etch: Resist is developed and chrome is etched to create the pattern.
• Inspection: Automated defect inspection systems scan the entire mask — KLA RAPID and Lasertec systems are industry standard.
• Repair: Focused ion beam (FIB) or nanomachining tools repair any detected defects.
• Pellicle: Thin transparent membrane stretched over the mask surface protects it from particle contamination during use.

Key Mask Technologies

Mask Suppliers

• Photronics: Largest independent mask manufacturer.
• Toppan: Major supplier for both DUV and EUV masks.
• DNP (Dai Nippon Printing): Leading mask producer, especially for Japanese fabs.
• In-House: TSMC, Samsung, Intel operate captive mask shops for leading-edge masks.

Photomasks are the most expensive consumable in semiconductor manufacturing — representing millions of dollars of investment per chip design and requiring absolute defect-free perfection to protect the billions of dollars in wafer processing that depend on them.