Home Knowledge Base A reticle or photomask is the precision pattern master used by a lithography scanner to print one layer of an integrated circuit onto photoresist.

A reticle or photomask is the precision pattern master used by a lithography scanner to print one layer of an integrated circuit onto photoresist. It carries geometric information for transistors, contacts, vias, and metal interconnects, so a modern chip requires a coordinated mask set with one or more masks for every patterned process layer.

The terms are often used interchangeably, although reticle commonly refers to the reduced field pattern stepped across a wafer, while photomask is the broader term for a patterned optical plate. In a typical deep-ultraviolet (DUV) process, the pattern is written at four times the intended wafer dimensions and reduction optics project it onto the resist. The scanner repeatedly exposes fields across the wafer while alignment systems register each new layer to structures already fabricated.

DUV and EUV masks work differently. A DUV mask is primarily transmissive: light passes through a fused-silica substrate and is modulated by absorber or phase-shifting features. An extreme-ultraviolet (EUV) mask is reflective because EUV radiation is strongly absorbed by ordinary materials. It uses a multilayer mirror stack, an absorber pattern, and carefully controlled surface topography.

Mask systemOptical behaviorTypical constructionKey challenge
DUV reticleTransmissiveFused silica with absorber and optional phase-shift structuresCritical-dimension and phase control
EUV maskReflectiveMultilayer mirror with patterned absorberBuried defects, 3D mask effects, and reflectivity
PellicleProtective membraneThin film held above the patterned surfaceTransmission, heating, and mechanical durability

The shapes on a mask are not always literal copies of the desired wafer features. Optical proximity correction (OPC) deliberately distorts edges and adds sub-resolution assist features so the projected image prints closer to the design target after diffraction, resist effects, and process bias. At advanced nodes, computational lithography and mask data preparation can make the written mask pattern far more complex than the final on-wafer geometry.

Mask quality has unusually high leverage. A repeating reticle defect can print in the same location in every exposed die, while contamination may reduce yield until the mask is cleaned or removed from production. Mask fabrication therefore includes electron-beam writing, resist processing, etch, dimensional metrology, defect inspection, review, and repair where possible. A pellicle keeps many particles far enough from the patterned surface that they remain out of focus during exposure.

Reticle management also includes qualification, storage, cleaning limits, defect maps, exposure history, and scanner matching. Engineers monitor critical dimensions, registration, transmission or reflectivity, and printable defects throughout the mask's production life. Because each reticle is tied to a specific design layer and revision, version control and physical traceability are essential.

<svg viewBox="0 0 760 470" xmlns="http://www.w3.org/2000/svg" font-family="-apple-system,Segoe UI,Roboto,sans-serif">
  <rect width="760" height="470" fill="#07131b"/>
  <rect x="24" y="24" width="712" height="422" rx="18" fill="#10222e" stroke="#587889" stroke-width="1.2"/>
  <text x="380" y="60" fill="#f5f8fa" font-size="20" font-weight="700" text-anchor="middle">Reticle to Wafer Pattern Transfer</text>
  <text x="380" y="84" fill="#93abb8" font-size="12" text-anchor="middle">reduction optics project a precision mask pattern into photoresist</text>
  <rect x="95" y="130" width="190" height="150" rx="10" fill="#173441" stroke="#5bc7df"/>
  <text x="190" y="158" fill="#a8e8f5" font-size="14" font-weight="600" text-anchor="middle">Reticle</text>
  <path d="M125 190H255M125 220H255M155 175V255M220 175V255" stroke="#7ad8ea" stroke-width="7"/>
  <path d="M305 205H390" stroke="#f3bd4d" stroke-width="3" marker-end="url(#arrow)"/>
  <circle cx="350" cy="205" r="28" fill="#162b36" stroke="#f3bd4d" stroke-width="2"/>
  <text x="350" y="209" fill="#ffe09a" font-size="11" text-anchor="middle">4x</text>
  <rect x="420" y="145" width="245" height="120" rx="10" fill="#173441" stroke="#6ed89d"/>
  <text x="542" y="173" fill="#baf1cf" font-size="14" font-weight="600" text-anchor="middle">Wafer field</text>
  <path d="M460 205H625M500 185V235M570 185V235" stroke="#8ce5b2" stroke-width="5"/>
  <rect x="105" y="320" width="250" height="62" rx="9" fill="#0f1f29" stroke="#5bc7df"/>
  <text x="230" y="346" fill="#8fe0ef" font-size="12" font-weight="600" text-anchor="middle">Pattern fidelity</text>
  <text x="230" y="366" fill="#a9bec7" font-size="10" text-anchor="middle">OPC, dimensions, and registration</text>
  <rect x="405" y="320" width="250" height="62" rx="9" fill="#0f1f29" stroke="#f3bd4d"/>
  <text x="530" y="346" fill="#ffd778" font-size="12" font-weight="600" text-anchor="middle">Defect control</text>
  <text x="530" y="366" fill="#a9bec7" font-size="10" text-anchor="middle">inspection, repair, pellicle, and cleaning</text>
  <defs><marker id="arrow" viewBox="0 0 10 10" refX="8" refY="5" markerWidth="7" markerHeight="7" orient="auto"><path d="M0 0L10 5L0 10Z" fill="#f3bd4d"/></marker></defs>
</svg>

In practice, the reticle is the bridge between circuit layout data and printed silicon. Its pattern fidelity, cleanliness, and registration directly affect whether every lithography layer lands at the intended dimensions and position.

reticle / photomasklithography

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