Segregate (Binning) is the physical separation of wafers within a lot or lots within a batch into distinct groups based on measurement results, process history, or experiment assignment — a fundamental logistics operation in semiconductor manufacturing that enables split-lot experimentation, defect isolation, yield-based dispositioning, and compliance with customer-specific quality requirements by ensuring that wafers with different histories never mix in downstream processing.

What Is Segregation?

• Definition: Segregation is the act of physically moving wafers from one FOUP (Front Opening Unified Pod) to another based on a sort map that assigns each wafer slot to a destination group. The sort map is generated by manufacturing execution system (MES) rules, engineering instructions, or automated disposition algorithms.
• Automation: Modern fabs use robotic wafer sorters (e.g., Brooks Automation, RECIF) that read the laser-scribed wafer ID on each wafer, verify identity against the MES database, and place wafers into the correct destination FOUP without human handling — eliminating misidentification errors and particle contamination from manual sorting.
• Granularity: Segregation operates at the wafer level (individual wafers within a lot), the lot level (entire lots within a batch), or the die level (post-dicing binning into quality grades based on electrical test results).

Why Segregation Matters

• Experiment Integrity: Split-lot experiments require physical separation of control and experimental groups so that each sub-group receives its designated process recipe without cross-contamination of conditions. Without segregation, an experiment comparing two etch recipes would produce meaningless data.
• Defect Containment: When inline inspection detects a defect excursion on specific wafers, segregation isolates the affected wafers for engineering review while allowing clean wafers to continue production — preventing the entire lot from being held and destroying cycle time.
• Customer-Specific Requirements: Automotive customers often require that wafers processed during a tool excursion be segregated and tracked separately, even if electrical test results are within specification, because their quality standards demand full traceability of any anomalous processing history.
• Yield-Based Binning: After wafer probe (electrical test), wafers are binned into yield categories — high-yield wafers proceed to premium packaging, marginal wafers go to lower-tier products, and failing wafers are scrapped. This die-level segregation maximizes revenue extraction from every wafer.

Segregation Workflow

Step 1 — Sort Map Generation: The MES or engineer creates a sort map specifying which wafer IDs go to which destination FOUP. Maps can be generated manually (engineering instruction), automatically (disposition algorithm based on metrology data), or by recipe (split-lot experiment design).

Step 2 — Wafer ID Verification: The sorter reads the laser-scribed ID (typically OCR of alphanumeric characters on the wafer edge) and cross-references against the MES to confirm identity, lot membership, and current process step. Mismatched wafers trigger an alarm.

Step 3 — Physical Transfer: Robotic arms transfer wafers from source FOUPs to destination FOUPs according to the sort map. The sorter logs every transfer with timestamp, source slot, destination slot, and wafer ID — creating a complete audit trail.

Step 4 — MES Update: The manufacturing execution system updates lot composition, child lot creation (for splits), and wafer-to-lot assignments. Downstream tools receive the updated lot information and apply the correct recipes to each sub-group.

Segregate is sorting the deck — the robotic logistics operation that transforms a homogeneous lot into purpose-specific sub-groups, enabling experimentation, defect containment, and quality-grade optimization across the entire semiconductor production flow.