Semiconductor Reliability — ensuring chips function correctly over their intended lifetime under real-world operating conditions.
Key Failure Mechanisms
- Electromigration (EM): Current flow physically moves metal atoms in interconnects, eventually causing open circuits. Worse at high current density and temperature
- TDDB (Time-Dependent Dielectric Breakdown): Gate oxide degrades over time under electric field stress until it shorts
- HCI (Hot Carrier Injection): High-energy carriers get trapped in gate oxide, shifting threshold voltage
- NBTI (Negative Bias Temperature Instability): PMOS transistor degradation under negative gate bias. Major concern for scaled devices
- BTI: Both NBTI and PBTI affect threshold voltage over time
Testing Methods
- Accelerated Life Testing: Elevated temperature and voltage to compress years into hours. Use Arrhenius equation to extrapolate
- Burn-In: Stress chips at high temp/voltage before shipping to weed out infant mortality failures
- HTOL (High Temperature Operating Life): 1000+ hours at 125C to verify lifetime
Metrics
- FIT (Failures In Time): Failures per billion device-hours. Target: < 10 FIT for automotive
- MTBF: Mean Time Between Failures
Reliability is especially critical for automotive (10-15 year lifetime) and aerospace applications.