Silicon Nitride (SiN/Si3N4) Deposition encompasses the CVD processes — primarily LPCVD and PECVD — used to deposit silicon nitride films that serve as etch stops, hard masks, spacers, stress liners, passivation layers, and diffusion barriers throughout CMOS fabrication. Silicon nitride is one of the most versatile and frequently deposited films in semiconductor manufacturing, with different deposition methods producing films with distinct properties tailored to each application.

LPCVD silicon nitride (Si3N4) is deposited at 700-800°C and 200-500 mTorr using dichlorosilane (SiH2Cl2) and ammonia (NH3): 3SiH2Cl2 + 4NH3 → Si3N4 + 6HCl + 6H2. This produces stoichiometric, dense, high-stress (~1.2 GPa tensile) films with excellent etch selectivity, very low hydrogen content, and superior barrier properties. LPCVD nitride is used for: hard masks (resistant to oxide etch), CMP stop layers (for STI planarization), diffusion barriers (blocks Na+ and moisture penetration), and MEMS structural layers. The high deposition temperature limits its use to early process steps before metal deposition.

PECVD silicon nitride (SiNx:H) is deposited at 200-400°C and 1-5 Torr using silane (SiH4) and NH3 or N2 with RF plasma excitation. The lower temperature enables deposition over aluminum or copper metallization. PECVD nitride is non-stoichiometric (contains 10-25% hydrogen) and has tunable properties: adjusting SiH4/NH3 ratio and RF power/frequency controls film stress from ~1 GPa compressive to ~0.5 GPa tensile, refractive index from 1.8 to 2.2, and etch rate in HF. Applications include: passivation layers (final wafer protection), inter-metal dielectric caps, and contact etch stop layers (CESL).

ALD silicon nitride is deposited at 300-500°C using sequential exposures of silicon precursor (SiH2Cl2, BTBAS, or other aminosilanes) and plasma-activated nitrogen (N2 or NH3 plasma). ALD nitride provides angstrom-level thickness control and excellent conformality for: gate spacers at sub-5nm nodes (3-5nm thick, requiring atomic precision), etch stop liners in high-aspect-ratio structures, and inner spacers in GAA transistor architectures where the SiN fills the gap between nanosheet channels.

Stress engineering with silicon nitride is a key application: tensile SiN (deposited by PECVD with UV cure or by LPCVD) enhances electron mobility in NMOS channels, while compressive SiN (deposited by PECVD at high RF power) enhances hole mobility in PMOS channels. This dual stress liner (DSL) technique was a major performance booster at the 90-45nm nodes. At FinFET and GAA nodes, stress engineering has shifted to epitaxial S/D, but SiN spacer stress still contributes to channel strain.

Silicon nitride is the Swiss Army knife of semiconductor thin films — its chemical inertness, etch selectivity to oxide, tunable stress, excellent barrier properties, and compatibility with both high-temperature LPCVD and low-temperature PECVD make it indispensable at virtually every stage of CMOS process integration.