A single-electron transistor controls the flow of charge one electron at a time by trapping individual electrons on a small conductive island, sometimes called a quantum dot, that connects to source and drain electrodes through two tunnel junctions and couples capacitively to a gate electrode. Because the island is so small, adding or removing a single electron changes its electrostatic potential by a discrete, measurable amount, and this charging energy creates an energy barrier — Coulomb blockade — that suppresses current flow except at gate voltages where a stable, well-defined charge state on the island lines up with the source and drain Fermi levels. The device is extraordinarily power-efficient and extraordinarily sensitive to single-charge events, but those same properties are what make it hard to fabricate and hard to operate outside a cryostat: room-temperature operation demands an island only a few nanometers across so the charging energy exceeds the ambient thermal energy, and every stray capacitance, trapped charge, or fabrication variation in the surrounding dielectric directly disturbs the single-electron state the device is built to control.

Coulomb blockade exists because adding one electron to a small island costs a discrete charging energy, and that energy must be compared directly against the ambient thermal energy for blockade to be observable. The charging energy is given by $E_c = e^2/2C$, where $C$ is the total capacitance of the island — the sum of the source-junction, drain-junction, and gate capacitances — so a physically smaller island with less surrounding metal or dielectric area has proportionally less capacitance and therefore a larger charging energy; typical charging energies in demonstrated devices range from about 25 meV in island geometries near 5 nm up to roughly 250 meV in the smallest island geometries reported, near 1 nm.

Room-temperature operation requires the charging energy to exceed the thermal energy by roughly an order of magnitude, not merely to be larger than it, which is why island size scales so aggressively with target operating temperature. At 20 °C, the thermal energy $kT$ is approximately 26 meV, so a reliably blockaded room-temperature device needs a charging energy well above 100 meV, which in turn constrains total island capacitance to a fraction of a femtofarad and pushes island diameter down toward the 1 to 3 nm range achievable only with the most aggressive nanofabrication techniques, while devices intended only for cryogenic operation near -269 °C can use islands tens of nanometers across with charging energies of just a few meV.

Tunnel junction resistance must also exceed a quantum-mechanical threshold, independent of the charging-energy requirement, or the electron's location becomes too uncertain for Coulomb blockade to hold. Each tunnel barrier's resistance must stay above the resistance quantum, approximately 25,800 Ω (equivalently about 6,450 Ω in the four-times convention some papers use), because a lower-resistance junction lets the electron's wavefunction spread across the barrier fast enough that its charge state on the island is no longer well-defined, which is why practical SET tunnel barriers are engineered oxide or vacuum gaps roughly 1 nm thick rather than simple metal-metal contacts.

The gate coupling ratio, sometimes called the lever arm, determines how efficiently a given gate voltage swing translates into island potential shift, and it is set entirely by device geometry rather than by material choice. A gate placed closer to the island or with more overlap area increases $C_g$ relative to the total island capacitance, steepening the lever arm and reducing the gate voltage swing needed to sweep through one full Coulomb oscillation period, which is why gate placement, not just island size, is a first-order design variable in SET layout.

Granular metal films and disordered nanoparticle arrays offer a fabrication route that trades precise single-island control for statistical device yield across a large area. Rather than lithographically defining one island, a thin discontinuous metal film deposited near its percolation threshold forms many small, randomly sized conductive grains separated by nanometer-scale gaps, and a fraction of these naturally show Coulomb-blockade behavior with charging energies in the 25 to 100 meV range, an approach that has been used to demonstrate room-temperature single-electron effects without the tight dimensional control electron-beam lithography would otherwise require, at the cost of no control over which specific grain forms the active island.

Switching energy per single-electron event is orders of magnitude below a conventional MOSFET's gate-charging energy, which is the fundamental reason SETs are pursued for ultra-low-power niches despite their fabrication burden. Moving one electron across a charging energy of 100 meV dissipates energy on the attojoule scale per switching event, versus femtojoule-to-picojoule energies typically dissipated per switching event in a scaled CMOS gate, a gap of three to six orders of magnitude that motivates continued SET research for power-constrained sensing and metrology applications even though the device cannot match CMOS switching speed or density.

The device physics of a single-electron transistor was worked out and first demonstrated experimentally in the research groups that founded modern mesoscopic and single-charge physics, and TU Delft and Cambridge remain among the institutions most closely associated with that foundational work. Delft's mesoscopic physics groups produced some of the clearest early demonstrations of Coulomb blockade and Coulomb-diamond spectroscopy in lithographically defined metal islands, while Cambridge's Cavendish Laboratory contributed foundational single-electron pump work that directly informed later metrological current-standard efforts.

Silicon-based SETs built around a single dopant atom rather than a lithographically defined island represent the most extreme miniaturization route, using the atom itself as the conductive island. A single phosphorus or arsenic donor embedded in a silicon nanowire channel, positioned with sub-nanometer precision relative to nearby gate electrodes, can show Coulomb blockade with charging energies exceeding 100 meV because the effective island — the donor's bound-electron wavefunction — is smaller than any lithographically patterned metal island could achieve, and this approach connects single-electron transistor physics directly to donor-based silicon qubit research.

Industrial research groups track single-electron device physics primarily as a long-horizon post-CMOS sensing technology rather than as a near-term production target, and that evaluation posture shapes how much fabrication investment the topic receives outside dedicated metrology labs. Organizations including Samsung and imec have published exploratory single-electron and few-electron device studies alongside their broader post-CMOS device roadmaps, treating the technology as a watch-list item for extreme low-power sensing rather than as a candidate to replace mainstream logic transistors.

The economics of single-electron transistor adoption hinge on application fit rather than on scaling density, because a SET's fundamental advantage — extreme sensitivity to a single charge — is not the same advantage that drives conventional logic scaling. A SET that can detect one electron moving is enormously valuable for metrology, ultra-sensitive electrometry, and quantum-dot charge readout, roles where sensitivity rather than switching density is the figure of merit, so the roadmap question industry evaluation teams actually track is application niche fit, not transistor density, since a SET is not attempting to compete with a MOSFET on the same terms.

The forksheet, gate-all-around, junctionless, carbon-nanotube, and graphene architectures each aim to keep or extend a conventional many-electron switching current at ever-smaller dimensions; the single-electron transistor instead abandons that many-electron switching model entirely in favor of counting individual charges, which is why its adoption path runs through metrology and sensing rather than through a foundry logic roadmap. A silicon-channel or 2D-material innovation is judged by how many electrons it switches per unit area per unit time; a SET is judged by how reliably it can localize and detect exactly one electron at a time, and reconciling that single-charge precision with room-temperature stability, tight fabrication tolerances, and gate coupling control together is what determines whether a given SET design becomes a usable device rather than a laboratory curiosity. Read single electron transistors through a coupled-systems lens: island size, tunnel-junction resistance, gate coupling ratio, and background charge noise do not improve independently, so a single-electron transistor only becomes practically useful when island fabrication, barrier quality, and gate geometry are all qualified together against the same charging-energy and operating-temperature target that motivated building a single-electron device in the first place.

Appendix: Process Control and Metrology Reference

Electron-counting statistics, not simple current measurement, are how a single-electron pump's accuracy is actually characterized, since the whole point of the device is that each clock cycle should transfer exactly one electron and no more. Metrology labs compare the pumped current against an independent current reference over long integration times, looking for deviations from the ideal $I = ef$ relationship at the part-per-million level, a measurement precision far beyond what a simple oscilloscope trace of Coulomb oscillations could provide, and it is this counting-statistics approach that underlies the electrical-current redefinition work pursued at NIST and sibling national metrology institutes.

Dilution-refrigerator electrical characterization, run at temperatures approaching -269 °C, remains the standard qualification environment for research-grade single-electron devices, since most demonstrated island geometries still require cryogenic charging energies to see clean Coulomb blockade. Standard measurements include gate-voltage sweeps to map the Coulomb-oscillation period, drain-bias sweeps to extract the charging energy from Coulomb-diamond width, and long-time-series charge-noise measurements to quantify background offset-charge drift before a device design is considered characterized.

Academic groups at MIT, Stanford, and UC Berkeley continue to publish on next-generation island fabrication, background-charge suppression, and radio-frequency charge-sensing techniques aimed at pushing single-electron devices toward higher operating temperature and better reproducibility. Work spanning donor-atom SETs, oxidation-sharpened nanowire islands, and improved dielectric processing to reduce trap density continues to feed candidate techniques into the same metrology and quantum-sensing pipelines that have kept single-electron transistor research active for decades.