Taguchi methods are a set of DOE and quality engineering approaches developed by Genichi Taguchi that focus on designing products and processes that are robust — performing consistently even when subjected to uncontrollable variation (noise factors). The philosophy emphasizes quality through design rather than inspection.

Core Philosophy

• Quality Loss Function: Taguchi argued that quality loss occurs as soon as a response deviates from its target — not just when it exceeds specification limits. The loss increases quadratically with deviation: $L = k(y - T)^2$.
• Robust Design: Instead of trying to eliminate all sources of variation (often impossible), design the process so its output is insensitive to variation in noise factors.
• Signal-to-Noise Ratio (S/N): Optimize the ratio of useful signal to noise rather than just the mean response.

Orthogonal Arrays

Taguchi uses pre-designed orthogonal arrays (OA) as experimental layouts:

• L4: 3 factors at 2 levels in 4 runs.
• L8: 7 factors at 2 levels in 8 runs.
• L9: 4 factors at 3 levels in 9 runs.
• L18: Up to 8 factors at mixed 2- and 3-levels in 18 runs.

Orthogonal arrays are a specific type of fractional factorial design — they ensure balanced, efficient coverage of the factor space.

Inner and Outer Arrays

• Inner Array (Control Factors): The engineer-controllable process parameters being optimized (e.g., temperature, pressure, gas flow).
• Outer Array (Noise Factors): Uncontrollable sources of variation (e.g., lot-to-lot material variation, environmental changes, equipment aging).
• The experiment crosses both arrays: for each control factor setting, the response is measured under multiple noise conditions. The S/N ratio quantifies robustness.

S/N Ratio Types

• Nominal-is-Best: $S/N = 10 \log(\bar{y}^2 / s^2)$ — when the target is a specific value (e.g., CD target of 30 nm).
• Smaller-is-Better: $S/N = -10 \log(\frac{1}{n}\sum y_i^2)$ — when minimizing the response (e.g., defect count, roughness).
• Larger-is-Better: $S/N = -10 \log(\frac{1}{n}\sum 1/y_i^2)$ — when maximizing the response (e.g., etch selectivity).

Semiconductor Applications

• Robust Etch Process: Find etch conditions that maintain CD target despite wafer-to-wafer film thickness variation.
• Lithography: Optimize exposure conditions for maximum process window (robust to focus and dose variation).
• CMP: Find polishing conditions that give consistent results across pattern densities.

Taguchi methods brought robust design thinking into mainstream manufacturing — the emphasis on reducing sensitivity to variation rather than simply hitting a target remains highly influential in semiconductor process development.