Tungsten metallization in semiconductor manufacturing refers to the process of depositing tungsten metal into contact holes and vias by chemical vapor deposition to form vertical electrical connections between interconnect levels and between the first metal layer and the silicon devices below. Tungsten's combination of thermal stability, resistance to electromigration, and compatibility with fluorine-based CVD chemistry established it as a widely used contact and via-fill metal, while copper and other conductors serve different wiring levels and alternative metals are evaluated as dimensions shrink. The complete tungsten plug module encompasses contact preparation and cleaning, liner or barrier deposition, nucleation of a continuous tungsten seed layer, bulk CVD fill with WF₆ reduction chemistry, and CMP or etchback to remove the overburden and isolate individual plugs — each step constrained by the others because a change to any one can shift resistance distributions, yield, and reliability across the whole module.

The tungsten CVD plug module is an integration sequence where contact cleaning, liner deposition, nucleation, bulk fill, and CMP are coupled through shared interfaces, and optimizing any single step without verifying the effect on the others can shift resistance distributions or create latent reliability failures. A contact clean that lowers median resistance but etches the dielectric sidewall or damages the junction is not a successful clean; a nucleation recipe that produces a uniform seed on blanket TiN may leave gaps on the recessed bottom of a high-aspect-ratio contact; and a CMP process that clears the overburden efficiently may recess the plug below the dielectric surface, adding resistance and complicating the next via landing. The integration discipline requires split-lot experiments that correlate process changes with electrical distributions — contact resistance, via chain yield, leakage — rather than with single-point physical measurements.

The Ti/TiN liner can provide adhesion, contact formation, and a fluorine diffusion barrier, and its conformality in the contact hole determines whether tungsten nucleates uniformly and whether fluorine from WF₆ reaches sensitive interfaces during deposition. In a conventional integration, Ti participates in forming a low-resistance contact while TiN supplies the barrier and nucleation surface; the exact materials, thicknesses, and thermal sequence depend on the device flow. A useful measured quantity is the specific contact resistivity $\rho_c$, defined from contact resistance $R_c$ and electrically active contact area $A_c$ as

This definition is simple, but extracting $\rho_c$ accurately requires a suitable test structure and an area model that accounts for current crowding. Doping, silicide phase, interface preparation, barrier height, and thermal history all affect the result. A blanket TiN thickness measurement also cannot prove that the bottom and lower sidewall of a narrow contact have adequate coverage, so cross-section metrology and electrical testing at the worst-case contact geometry remain essential.

Tungsten nucleation uses silane or diborane reduction of WF₆ to deposit a thin, continuous seed layer on the TiN barrier before switching to the slower but more conformal hydrogen reduction chemistry for bulk fill. The silane-based nucleation reaction

can establish tungsten more readily than H₂ reduction alone on some barrier surfaces. The qualified dose must produce a thin, continuous seed without consuming so much feature volume that the opening pinches off early. If the seed is discontinuous, the subsequent bulk fill can grow from isolated islands rather than as a uniform front, creating voids or weak grain boundaries. Diborane (B₂H₆) nucleation is another integration option, but its suitability and impurity control must be demonstrated for the chosen barrier and thermal budget.

Bulk tungsten fill by hydrogen reduction of WF₆ is the workhorse deposition step, chosen for its high conformality and moderate deposition rate that allows the growing film to fill contacts and vias without sealing the opening before the bottom is reached. The reaction

is commonly run in a several-hundred-degree-Celsius process regime, but temperature, pressure, gas ratios, and deposition rate are chamber- and recipe-specific. Conformality must be qualified at the worst-case feature geometry because an acceptable blanket rate does not guarantee void-free fill. Growth from opposing sidewalls can meet at the feature center and form a seam; whether that seam is benign depends on voiding, impurities, microstructure, and the electrical cross-section. Fluorine-related risk likewise has no universal single-number limit: residual fluorine, by-product removal, and barrier integrity must be assessed together through materials analysis and electrical reliability testing.

The resistivity of CVD tungsten is process-dependent and can exceed the bulk value because surfaces, grain boundaries, impurities, phase, and microstructure add scattering channels. Bulk tungsten is often quoted near 5.3 µΩ·cm at room temperature, but the value measured in a deposited film depends on thickness and process history. The simplified Fuchs-Sondheimer surface-scattering correction illustrates one thickness-dependent contribution,

where $\rho_0$ is the reference bulk resistivity, $\lambda$ is the electron mean free path, $d$ is film thickness, and $p$ is the surface-scattering specularity parameter. This expression does not model grain-boundary scattering; that contribution requires a separate model and measured microstructure. As conductors shrink, size-dependent resistance and the area consumed by liners and barriers motivate evaluation of ruthenium, molybdenum, cobalt, and other integration schemes alongside tungsten.

Clean contact opening: remove polymer, native oxide, and etch residues → Deposit the qualified adhesion/contact layer and diffusion barrier → Form or stabilize the contact interface according to the integration thermal sequence → Load into tungsten CVD chamber and stabilize the recipe → Nucleation: reduce WF₆ with the qualified seed chemistry until coverage saturates → Bulk fill: reduce WF₆ with H₂ until the feature is filled with sufficient overburden → Cool and transfer to the removal module → W CMP or etchback: remove overburden and isolate plugs → Post-clean to remove slurry or etch residues and particles → Electrical test: contact resistance, via-chain yield, and leakage → Qualify resistance distribution, fill integrity, and fluorine-related reliability across splits

Tungsten CMP removes the overburden deposited during blanket CVD, isolating individual plugs and restoring a planar surface for the next interconnect level, but the polish must clear tungsten and the liner without excessive plug recess or dielectric erosion. A tungsten CMP slurry typically combines oxidation of the surface with mechanical removal, while inhibitor, abrasive, pH, pressure, and pad state determine removal rate and selectivity. No single selectivity or recess number applies across stacks and tools: the acceptable window follows from dielectric loss, plug resistance, topography, defectivity, and the landing margin of the next level. Multi-step recipes can separate rapid bulk removal from a more selective finishing step, but they still require endpoint control and within-wafer verification.

Read tungsten metallization through a contact-resistance-budget lens: every interface in the plug stack — silicide to silicon, Ti to silicide, TiN to tungsten seed, seed to bulk fill, bulk fill through seam, plug top to via landing — contributes to the total measured resistance, and the integration engineer's task is to minimize each contribution while keeping fluorine contained, conformality adequate, and the CMP surface planar enough for reliable via connection at the next level.