Via stacking (also called via tower or stacked vias) is the practice of vertically aligning vias across multiple metal layers so they form a direct vertical column from one metal layer to another — creating the shortest, lowest-resistance inter-layer connection path.
How Via Stacking Works
- In a typical metal stack with layers M1 through M10+, connecting M1 to M5 requires passing through V1 (M1→M2), V2 (M2→M3), V3 (M3→M4), and V4 (M4→M5).
- Stacked Vias: All four vias are placed directly above each other — forming a vertical column.
- Staggered Vias: The vias are offset laterally, with short wire jogs on each intermediate metal layer to connect them. This is the alternative when stacking is not possible or not allowed.
Benefits of Via Stacking
- Minimum Resistance: The direct vertical path has the lowest possible resistance — no intermediate wire segments to add resistance.
- Minimum Area: Stacked vias occupy the minimum footprint — no lateral jogs consume routing resources on intermediate layers.
- Structural Integrity: A vertical column of well-aligned vias forms a mechanically strong pillar.
- Thermal Path: Direct vertical stacking provides the best thermal conduction between metal layers.
Via Stacking Rules and Restrictions
- Some Processes Restrict Stacking: At certain nodes, the foundry prohibits stacking more than 2–3 vias in a direct column due to:
- Stress Concentration: A tall pillar of vias creates localized stress that can crack surrounding dielectric.
- CMP Effects: Via pillars can cause polishing anomalies in the dielectric above them.
- Topography: Accumulated via bumps create non-planarity.
- Stacking Rules: When restricted, the design rules specify maximum number of consecutive stacked vias — requiring staggering beyond that limit.
Via Stacking in Practice
- Power Grid: Via stacks are heavily used in power delivery — connecting top-layer power straps down to lower-layer rails with minimum resistance. Power vias are often in large arrays that are inherently stacked.
- Clock Trees: Clock distribution uses via stacks for direct inter-layer connections with minimum delay.
- Signal Routing: General signal routing typically uses staggered vias due to routing constraints, but critical nets benefit from stacking where possible.
- I/O Connections: Bump to pad to internal routing typically uses a via stack through all metal layers.
Stacking vs. Staggering Tradeoffs
| Property | Stacked | Staggered |
|---|---|---|
| Resistance | Lower | Higher (adds wire segments) |
| Area | Less | More (needs jog space) |
| Stress | Higher (concentrated) | Lower (distributed) |
| Routing Flexibility | Less (requires alignment) | More (can navigate obstacles) |
Via stacking is the preferred approach for low-resistance vertical connections — particularly critical in power delivery networks where every milliohm of resistance affects IR drop and chip performance.
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