Wafer bonding techniques join two wafers together for 3D integration, SOI substrate fabrication, MEMS packaging, or photonics integration, with different methods suited to different applications and requirements. Direct bonding (fusion bonding) joins hydrophilic surfaces at room temperature through van der Waals forces, followed by high-temperature annealing (800-1100°C) to form strong covalent bonds—this requires atomically smooth surfaces and is used for SOI and 3D integration. Anodic bonding applies voltage and heat (300-500°C) to bond silicon to glass, used for MEMS packaging. Adhesive bonding uses polymer layers (BCB, polyimide) providing tolerance to surface roughness and particles but with lower thermal conductivity and temperature limits. Metal bonding (Cu-Cu, Au-Au) provides electrical and mechanical connection through thermocompression or diffusion bonding at 200-400°C. Hybrid bonding simultaneously bonds dielectric and metal regions, enabling high-density interconnects for 3D integration. Eutectic bonding uses metal alloys that melt at specific temperatures for hermetic sealing. Each technique has tradeoffs in bond strength, thermal budget, alignment accuracy, and throughput. Wafer bonding is critical for advanced packaging and heterogeneous integration.