Home Knowledge Base Wafer Stress Measurement

Wafer Stress Measurement is a semiconductor metrology discipline that characterizes mechanical stress in silicon wafers and thin films — critical for predicting device performance (strained silicon mobility enhancement), process reliability (film cracking, delamination), and yield (overlay distortion from wafer bow), using techniques ranging from full-wafer optical profilometry to nanometer-resolution Raman spectroscopy for localized stress in individual transistor channels.

Why Stress Matters in Semiconductor Manufacturing

Stress in semiconductor structures is both intentional and unintentional:

Intentional stress — performance enhancement: Compressive stress in PMOS channels and tensile stress in NMOS channels increases carrier mobility by 20-80% through modification of the effective mass and scattering rate. Intel's 90nm node (2003) was the first to intentionally engineer uniaxial channel stress via embedded SiGe source/drain regions — a technique adopted across every subsequent process generation.

Unintentional stress — reliability risk: Deposition of thin films (nitride liners, metal interconnects, low-k dielectrics) introduces residual stress that can cause cracking, delamination, or metal voiding under thermal cycling. Managing unintentional stress is a primary challenge in BEOL (back-end-of-line) processing.

Measurement Techniques

TechniqueSpatial ResolutionWhat It MeasuresSensitivity
Wafer bow / warpFull-wafer (mm)Global curvature from film stress~1 MPa
Raman spectroscopy~1 μm (diffraction limited)Peak frequency shift → stress~10 MPa
Micro-Raman (μ-Raman)~200 nmLocal stress near transistor features~10 MPa
X-ray diffraction (XRD)mm to μmLattice parameter change → strain~0.01% strain
Synchrotron μ-XRD~100 nmNanoscale strain mapping~0.001% strain

Wafer Bow Measurement (Global Stress)

Capacitance gauges or optical interferometry measure the curvature of the wafer before and after film deposition. Stoney's equation relates curvature κ to film stress σ_f:

σ_f = (E_s × t_s²) / (6 × (1 - ν_s) × t_f × κ)

where E_s and ν_s are the substrate's Young's modulus and Poisson's ratio, and t_s, t_f are substrate and film thicknesses. Specification: global wafer bow < 50 μm for 300mm wafers in lithography tools to maintain overlay budget.

Raman Spectroscopy (Local Stress)

Silicon has a characteristic Raman peak at 520 cm⁻¹ (stress-free). Applied stress shifts this peak:

Conversion: Δω ≈ -1.9 cm⁻¹/GPa (for uniaxial stress in [110] direction). Micro-Raman achieves ~1 μm spatial resolution, sufficient to probe stress near STI (shallow trench isolation) edges and embedded SiGe source/drain regions.

Process Control Implications

Stress monitoring drives critical process decisions:

Local stress < 500 MPa is typically specified for critical areas to prevent reliability failures over the 10-year device lifetime.

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