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  <text x="380" y="28" fill="#e6edf3" font-size="21" font-weight="700" text-anchor="middle">Yield — Good Dies per Wafer</text>
  <text x="380" y="48" fill="#8b98a5" font-size="12" text-anchor="middle">Y = e^(-D0 &#xB7; A) — defect density times die area determines how many chips survive fabrication</text>

  <!-- === LEFT: Wafer map (top-down, showing good/bad dies) === -->
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  <text x="180" y="80" fill="#e6edf3" font-size="11" text-anchor="middle" font-weight="600">Wafer Map (300mm)</text>

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  <!-- Legend -->
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  <text x="62" y="319" fill="#6ee7b7" font-size="8">good die</text>
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  <text x="122" y="319" fill="#fca5a5" font-size="8">defective</text>
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  <text x="186" y="319" fill="#6b7684" font-size="8">edge (partial)</text>

  <text x="180" y="340" fill="#8b98a5" font-size="9" text-anchor="middle">~85% yield shown (typical mature node)</text>

  <!-- === RIGHT TOP: Yield model === -->
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  <text x="540" y="80" fill="#e6edf3" font-size="11" text-anchor="middle" font-weight="600">Yield Models</text>

  <text x="370" y="102" fill="#fbbf24" font-size="10" font-weight="600">Poisson: Y = e^(-D0 &#xB7; A)</text>
  <text x="370" y="118" fill="#8b98a5" font-size="8.5">D0 = defect density (defects/cm&#xB2;)</text>
  <text x="370" y="132" fill="#8b98a5" font-size="8.5">A = die area (cm&#xB2;)</text>
  <text x="370" y="148" fill="#6b7684" font-size="8">larger die → exponentially lower yield</text>

  <text x="370" y="170" fill="#c4b5fd" font-size="9.5">Murphy/Neg-Binomial: Y = (1 + D0&#xB7;A/&#x3B1;)^(-&#x3B1;)</text>
  <text x="370" y="185" fill="#6b7684" font-size="8">more realistic — accounts for defect clustering</text>

  <!-- === RIGHT MIDDLE: Die area impact === -->
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  <text x="540" y="218" fill="#e6edf3" font-size="10" text-anchor="middle" font-weight="600">Die Area vs Yield (D0 = 0.1 def/cm&#xB2;)</text>

  <text x="370" y="240" fill="#34d399" font-size="9">50 mm&#xB2; (small SoC):  Y &#x2248; 95%</text>
  <text x="370" y="256" fill="#60a5fa" font-size="9">200 mm&#xB2; (midsize):   Y &#x2248; 82%</text>
  <text x="370" y="272" fill="#fbbf24" font-size="9">400 mm&#xB2; (GPU):      Y &#x2248; 67%</text>
  <text x="370" y="288" fill="#f87171" font-size="9">800 mm&#xB2; (H100):    Y &#x2248; 45%</text>
  <text x="370" y="304" fill="#6b7684" font-size="8.5">→ this is why chiplets win: 4×200mm&#xB2; > 1×800mm&#xB2; yield</text>

  <!-- === BOTTOM: Yield ramp + economics === -->
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  <text x="380" y="378" fill="#e6edf3" font-size="10" text-anchor="middle" font-weight="600">Yield Ramp Lifecycle</text>
  <text x="50" y="398" fill="#f87171" font-size="9">Early: 20-40% (learning, bring-up)</text>
  <text x="250" y="398" fill="#fbbf24" font-size="9">Ramp: 50-70% (improving)</text>
  <text x="450" y="398" fill="#34d399" font-size="9">Mature: 85-95% (production)</text>
  <text x="50" y="414" fill="#6b7684" font-size="8.5">N3 took 12+ months to reach 80% yield — each new node starts the learning curve over</text>

  <!-- Economics -->
  <text x="380" y="438" fill="#e6edf3" font-size="9.5" text-anchor="middle" font-weight="600">Economics: H100 die at 45% yield on $15K wafer → ~$2000 per good die (before packaging/test)</text>
  <text x="380" y="453" fill="#8b98a5" font-size="9" text-anchor="middle">Yield is the #1 factor in chip cost — 1% yield improvement at TSMC = billions in revenue</text>

  <text x="380" y="464" fill="#6b7684" font-size="11" text-anchor="middle">Yield is the tax physics charges on ambition — bigger dies, newer nodes, tighter tolerances all reduce it.</text>
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```d is the fraction of manufactured units that work — most commonly die yield, the share of dies on a wafer that pass test. It is the number that turns a process into a business: with hundreds of process steps where a single defect can kill a die, yield sets cost-per-good-die and gates whether a design is manufacturable at all.\n\n**A wafer holds many dies; a defect anywhere in a die usually kills it.** Random particle and pattern defects land across the wafer at some average density D0 (defects per unit area). The larger a die, the more likely it catches at least one defect — so good dies cluster where defects happen to miss, and yield is simply good dies over total dies. Edge dies that fall off the round wafer are lost too, which is a second, geometric yield term separate from defects.\n\n**Yield falls exponentially with die area — this is the whole argument for chiplets.** Under the simplest Poisson model, yield Y = e^(-A·D0): double the area A and yield drops sharply. Real defects cluster rather than scatter uniformly, so fabs use the Murphy or negative-binomial models, which are more forgiving than Poisson but keep the same shape. Either way, one big monolithic die yields far worse than several small ones doing the same work — so splitting a design into chiplets recovers yield and is often the difference between viable and not.\n\n| Term | Meaning | Why it matters |\n|---|---|---|\n| Die yield | good dies / total dies | drives cost-per-good-die |\n| D0 | defect density (defects/cm2) | lower = more good dies |\n| Critical area | area where a defect is fatal | links layout to yield |\n| Poisson Y=e^(-A·D0) | uniform-defect model | quick estimate |\n| Murphy / neg-binomial | clustered-defect models | fab-accurate |\n\n```svg\n<svg viewBox="0 0 1000 480" xmlns="http://www.w3.org/2000/svg" font-family="-apple-system,Segoe UI,Roboto,Helvetica,Arial,sans-serif">\n  <rect x="0" y="0" width="1000" height="480" rx="14" fill="#1d1c1a"/>\n  <text x="36" y="38" fill="#e8e6f7" font-size="20" font-weight="600">Yield — the fraction of good dies, and why big dies are punished by defects</text>\n\n  <!-- wafer -->\n  <circle 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r="3.4" fill="#e0913a" stroke="#1d1c1a" stroke-width="0.8"/><circle cx="223.9" cy="306.5" r="3.4" fill="#e0913a" stroke="#1d1c1a" stroke-width="0.8"/><circle cx="139.7" cy="137.5" r="3.4" fill="#e0913a" stroke="#1d1c1a" stroke-width="0.8"/><circle cx="280.7" cy="340.4" r="3.4" fill="#e0913a" stroke="#1d1c1a" stroke-width="0.8"/><circle cx="266.6" cy="186.1" r="3.4" fill="#e0913a" stroke="#1d1c1a" stroke-width="0.8"/><circle cx="345.4" cy="156.1" r="3.4" fill="#e0913a" stroke="#1d1c1a" stroke-width="0.8"/><circle cx="191.4" cy="303.5" r="3.4" fill="#e0913a" stroke="#1d1c1a" stroke-width="0.8"/>\n  <line x1="140" y1="322" x2="95" y2="215" stroke="#4a4a47" stroke-width="2"/>\n  <text x="245" y="395" fill="#d4d4d0" font-size="13" text-anchor="middle">green = good die &#183; red = die hit by a defect &#183; orange = defect</text>\n  <text x="245" y="415" fill="#8a8a86" font-size="12" text-anchor="middle">good 45 / 52 on this wafer &#8594; die yield = 87%</text>\n\n  <!-- chart -->\n  <text x="740" y="76" fill="#c9c3f2" font-size="14" text-anchor="middle">Yield vs die area (fixed defect density D&#8320;)</text>\n  <text x="552" y="274" fill="#8a8a86" font-size="12" text-anchor="end">25%</text><line x1="560" y1="270" x2="920" y2="270" stroke="#2a2a28" stroke-width="0.8"/><text x="552" y="224" fill="#8a8a86" font-size="12" text-anchor="end">50%</text><line x1="560" y1="220" x2="920" y2="220" stroke="#2a2a28" stroke-width="0.8"/><text x="552" y="174" fill="#8a8a86" font-size="12" text-anchor="end">75%</text><line x1="560" y1="170" x2="920" y2="170" stroke="#2a2a28" stroke-width="0.8"/><text x="552" y="124" fill="#8a8a86" font-size="12" text-anchor="end">100%</text><line x1="560" y1="120" x2="920" y2="120" stroke="#2a2a28" stroke-width="0.8"/>\n  <line x1="560" y1="320" x2="920" y2="320" stroke="#6f6f6a" stroke-width="1.3"/>\n  <line x1="560" y1="320" x2="560" y2="112" stroke="#6f6f6a" stroke-width="1.3"/>\n  <polyline points="560.0,120.0 572.0,139.0 584.0,156.3 596.0,171.8 608.0,185.9 620.0,198.7 632.0,210.2 644.0,220.7 656.0,230.1 668.0,238.7 680.0,246.4 692.0,253.4 704.0,259.8 716.0,265.5 728.0,270.7 740.0,275.4 752.0,279.6 764.0,283.5 776.0,286.9 788.0,290.1 800.0,292.9 812.0,295.5 824.0,297.8 836.0,299.9 848.0,301.9 860.0,303.6 872.0,305.1 884.0,306.6 896.0,307.8 908.0,309.0 920.0,310.0" fill="none" stroke="#7d70e0" stroke-width="2.5"/>\n  <polyline points="560.0,120.0 572.0,138.9 584.0,155.7 596.0,170.7 608.0,184.1 620.0,196.1 632.0,206.9 644.0,216.6 656.0,225.2 668.0,233.0 680.0,240.1 692.0,246.4 704.0,252.2 716.0,257.4 728.0,262.1 740.0,266.4 752.0,270.2 764.0,273.8 776.0,277.0 788.0,279.9 800.0,282.6 812.0,285.1 824.0,287.3 836.0,289.4 848.0,291.3 860.0,293.0 872.0,294.6 884.0,296.1 896.0,297.5 908.0,298.8 920.0,299.9" fill="none" stroke="#1f9e85" stroke-width="2.5"/>\n  <text x="914" y="304" fill="#c9c3f2" font-size="13" text-anchor="end">Poisson  Y=e^(-A&#183;D&#8320;)</text>\n  <text x="914" y="316" fill="#bff0e4" font-size="13" text-anchor="end">Murphy (clustered)</text>\n  <text x="740" y="342" fill="#8a8a86" font-size="12" text-anchor="middle">die area &#8594; (bigger chip)</text>\n  <text x="560" y="364" fill="#f0d9b5" font-size="12.5">Double the die area and yield falls exponentially &#8212; the core tension behind chiplets.</text>\n</svg>\n```\n\n**Yield is learned, not given.** A new node starts at low yield and climbs a learning curve as engineers find and kill systematic defect sources; an excursion (a sudden tool or material problem) can crash it overnight. Fabs push yield up with defect-density reduction, design-for-manufacturing rules that shrink critical area, and redundancy plus repair (spare rows in memory, spare cores) so a defective unit can be salvaged rather than scrapped.\n\nRead yield through a quant lens rather than a pass/fail lens: it is a probability that compounds over area and steps, and it flows straight into cost-per-good-transistor. Because Y = e^(-A·D0), the leverage is either lowering D0 or shrinking the die — which is exactly why chiplets, redundancy, and defect-density programs exist. Treat yield as a measured exponential to be engineered, not a fixed property of the process.