ald cobalt
**Atomic Layer Deposition of Cobalt** is the **conformal thin-film deposition technique that grows cobalt metal or cobalt compounds one atomic layer at a time on semiconductor surfaces** — providing the ultra-thin (1-3nm), pinhole-free, conformal liner and seed layers needed for advanced interconnect metallization where PVD-deposited barriers and seeds cannot achieve adequate step coverage in high-aspect-ratio vias and trenches at sub-14nm technology nodes.
**Why ALD Cobalt**
- PVD cobalt: Line-of-sight → poor coverage on via sidewalls at AR > 5:1.
- CVD cobalt: Better conformality but still non-uniform at AR > 10:1.
- ALD cobalt: Self-limiting surface reactions → perfect conformality at any AR.
- At 5nm node: Via dimensions ~12nm × 40nm deep (AR ~3:1 to 6:1) → PVD fails.
- ALD provides 95-100% step coverage vs. 30-60% for PVD in high-AR features.
**ALD Cobalt Process**
| Step | Reactant | Surface Reaction |
|------|---------|------------------|
| Dose A | Co precursor (Co(AMD)₂, CoCp₂, etc.) | Chemisorbs on surface → self-limiting |
| Purge | N₂ or Ar | Remove excess precursor |
| Dose B | H₂ plasma or NH₃ | Reduces adsorbed precursor → metallic Co |
| Purge | N₂ or Ar | Remove byproducts |
| Repeat | Dose A → Purge → Dose B → Purge | ~0.05-0.1nm per cycle |
**Growth Rate and Properties**
| Property | ALD Cobalt | PVD Cobalt |
|----------|-----------|------------|
| Growth rate | 0.05-0.1 nm/cycle | 10-100 nm/min |
| Conformality | >95% | 30-60% |
| Film purity | 95-99% Co | >99% Co |
| Resistivity | 15-30 µΩ·cm | 6-10 µΩ·cm |
| Film roughness | < 0.5nm RMS | 0.5-1.5nm RMS |
| Nucleation | Substrate-dependent | Good on most surfaces |
**Applications in CMOS Interconnect**
| Application | Thickness | Why ALD |
|------------|-----------|--------|
| Copper seed layer | 1-2nm | Conformal seed for Cu ECD fill |
| Cobalt liner on TaN barrier | 1-3nm | Improves Cu adhesion, reduces EM |
| Full cobalt fill (M0/M1) | Fill via entirely | Cu-free local interconnect |
| Cobalt cap on Cu | 1-2nm | Selective deposition, EM barrier |
| Barrier/liner combo | 2-4nm TaN(ALD) + Co(ALD) | Complete ALD barrier stack |
**Cobalt vs. Copper for Local Interconnects**
- At widths < 15nm: Cu resistivity increases dramatically (grain boundary + surface scattering).
- Cobalt: Higher bulk resistivity (6 vs. 1.7 µΩ·cm) BUT no barrier needed.
- Net result: Co without barrier = lower total resistance than Cu with TaN/Co barrier at < 12nm width.
- Industry shift: Intel/TSMC/Samsung use cobalt for lowest metal layers (M0, M1) at 10nm and below.
**Selective ALD Cobalt**
- Area-selective ALD: Deposit cobalt only on metal surfaces, not on dielectric.
- Self-assembled monolayer (SAM) blocks growth on dielectric → cobalt grows only on Cu/Co.
- Enables self-aligned cobalt capping without lithography.
- Emerging: Could eliminate via lithography entirely → fully self-aligned interconnects.
**Nucleation Challenge**
- ALD cobalt nucleates differently on different surfaces (TaN vs. SiO₂ vs. Cu).
- Poor nucleation → delayed growth → pinholes in thin films.
- Solutions: Surface treatment (plasma, SAM), specialized precursors, multi-pulse nucleation.
ALD cobalt is **the enabling deposition technology for sub-10nm interconnect metallization** — by providing perfectly conformal cobalt films at atomic-level thickness control, ALD makes possible the ultra-thin liners, seeds, and complete fills that conventional PVD and CVD cannot achieve in the aggressively scaled vias and trenches of modern CMOS back-end-of-line processing.