always-on domain
**An always-on domain** is a power domain that **remains continuously powered** and never shuts down — providing essential infrastructure services (control, monitoring, wake-up logic) that must function even when all other power domains on the chip are in deep sleep or completely powered off.
**Why Always-On Domains Exist**
- Power gating shuts down blocks to save leakage power — but **something must stay awake** to:
- **Detect wake-up events**: Monitor interrupt lines, timers, or external signals that trigger power-up.
- **Control power switches**: The logic that asserts power switch enables must be powered on to turn other domains back on.
- **Generate isolation signals**: Isolation cells need control signals from powered logic.
- **Maintain retention**: Retention flip-flop control signals come from always-on logic.
- **Provide clock/reset**: Basic clock and reset distribution may need to be always available.
**What Lives in the Always-On Domain**
- **Power Management Unit (PMU)**: Controls all power switches, isolation cells, retention signals, and power-up/down sequencing.
- **Wake-Up Controllers**: Monitor wake-up sources (GPIO interrupts, RTC timer, external reset) and initiate the power-up sequence.
- **Always-On Timers**: Real-time clock (RTC), watchdog timer — must keep running during chip-level sleep.
- **Voltage Regulators/PMICs Interface**: The interface to external power management ICs.
- **I/O Pads**: Some I/O pads must remain powered for wake-up signal detection.
- **Retention/Isolation Control**: Logic that generates SAVE, RESTORE, and ISO signals.
**Always-On Domain Design Constraints**
- **Minimum Logic**: Keep the always-on domain as small as possible — every gate in this domain leaks continuously.
- **Low-Leakage Cells**: Use high-Vth (HVT) standard cells for minimum leakage power.
- **Low Voltage**: Often operated at the lowest possible voltage to minimize leakage.
- **Separate Power Grid**: Has its own VDD rail (real VDD, not virtual) — independent of all switchable domains.
**Power Architecture**
- **Switchable Domains**: Connected to VDD through power switches → can be turned off.
- **Always-On Domain**: Connected **directly** to VDD → always powered.
- **Interface**: Isolation cells at every boundary between switchable and always-on domains.
- **Level Shifters**: If always-on domain runs at a different voltage than other domains.
**Always-On Domain in UPF**
```
create_power_domain AON -elements {pmu_logic wakeup_ctrl rtc}
create_power_domain CORE -elements {cpu_core}
-supply {VDD_sw} -shutoff_condition {pmu_logic/core_sleep}
```
The always-on domain is defined without a shutoff condition — it has no power switch.
**Tradeoff**
- The always-on domain represents an **irreducible leakage floor** — the minimum power the chip consumes even in deepest sleep.
- Minimizing the always-on domain area and leakage is critical for ultra-low-power applications (IoT, wearables, implantable devices).
The always-on domain is the **watchkeeper** of a power-managed SoC — it stays awake so the rest of the chip can safely sleep, enabling aggressive power gating without losing the ability to wake up.