anamorphic euv

**Anamorphic high-NA EUV** refers to the use of **different magnification ratios in the X and Y directions** in high-NA EUV lithography optics — specifically **4× reduction in the scanning direction and 8× reduction in the cross-scan direction**. This is a fundamental departure from conventional lithography, which uses the same magnification in both directions. **Why Anamorphic?** - Increasing the NA from 0.33 to 0.55 requires collecting light over much wider angles. If the same 4× magnification were maintained in both directions (as in current EUV), the **reticle (mask)** would need to be impractically large. - By using **8× reduction in one direction**, the mask field size is halved in that dimension, keeping the mask at the standard **6-inch (152 mm)** form factor. - This avoids the enormous cost and complexity of developing new, larger mask infrastructure. **Impact on Mask Design** - Current EUV: 4× magnification in both X and Y. Mask features are 4× larger than wafer features. - High-NA EUV: **4× in scan direction, 8× in cross-scan direction**. Mask features are 4× larger in one direction but 8× larger in the other. - The mask pattern is therefore **stretched** in one direction — mask data preparation and OPC (optical proximity correction) must account for this asymmetry. **Consequences** - **Halved Field Size**: The printable field per exposure is halved in the cross-scan direction (from ~26×33 mm to ~26×16.5 mm). This means **more exposures per die** for large chips, potentially impacting throughput. - **Stitching**: Large dies may need to be split across two or more exposure fields, requiring precise **field stitching** at the boundaries. - **Mask Making**: Mask writing and inspection tools must handle the anamorphic aspect ratio — different resolution requirements in X and Y. - **OPC Asymmetry**: Optical proximity effects differ in the two directions due to different magnifications, complicating computational lithography. **Field Size Solutions** - **Die Size Management**: Many advanced chips already fit within the reduced field. - **Stitching Technology**: ASML has developed techniques for stitching adjacent fields with minimal impact on yield. - **Design Co-optimization**: Chip architects may adjust floorplans to fit within the smaller field or optimize stitch boundaries. Anamorphic optics represent a **pragmatic engineering compromise** in high-NA EUV — trading field size for the ability to use existing mask infrastructure while achieving the resolution improvements needed for sub-2nm nodes.