Beta Multiplier Reference
# Beta-Multiplier Current Reference: Resistor-Defined Transconductance
A beta-multiplier reference is a self-biased MOS circuit that combines a current mirror, unequal transistor strengths and a source resistor to establish a nonzero bias current. Its useful property is that a transistor’s transconductance can depend mainly on a resistor and a device ratio under a simplified model. The reference current itself still depends on transistor parameters.
Here β means the MOS strength parameter μn Cox W/L. The size ratio K is greater than one; it is not BJT current gain.
## 1. Follow the four-transistor core
*Conceptual core with a 1:1 PMOS mirror and NMOS strength ratio K. Startup circuitry and body connections are omitted. Real bulk CMOS introduces body effect in the resistor-raised M2 source unless an appropriate isolated-body arrangement is used.*
The PMOS mirror approximately forces equal branch currents. Both NMOS gates share a voltage, but the larger M2 needs less overdrive to carry that current. Its source resistor absorbs the difference: VGS₁ − VGS₂ = I R. The nonzero operating point satisfies the mirror relation, transistor characteristics and this voltage relation together.
Assuming equal thresholds, negligible body effect and channel-length modulation, strong-inversion square-law operation, and β₂ = Kβ₁:
I = [2/(β₁ R²)] × (1 − 1/√K)²
At that operating point:
gm₁ = [2/R] × (1 − 1/√K)
The equations describe the nonzero solution. Dividing out the current while deriving them can hide another solution: both branches may remain effectively off.
## 2. See what the resistor controls
*Analytical nonzero-solution curve, not measured or PDK-simulated data. The assumed transistor model and ratio are fixed while R varies. The plot does not demonstrate startup or supply rejection.*
For K = 4, the ideal relations become gm₁ = 1/R and I = 1/(2β₁R²). Taking R = 10 kilohms and β₁ = 1 mA/V² gives I = 5 µA and gm₁ = 100 µS. M1 overdrive is 100 mV, M2 overdrive is 50 mV, and the resistor drop is 50 mV. Whether those overdrives justify a strong-inversion approximation depends on the real device and temperature; verify with the PDK model.
The term “constant-gm” refers to reduced dependence on transistor strength in this ideal relationship. Resistance tolerance and temperature coefficient still affect gm, while mobility and other device parameters affect current. The circuit is not an inherently temperature-independent current reference.
## 3. Make startup part of the design
Without startup assistance, a self-biased loop can remain near a zero-current state. A startup network briefly perturbs a suitable bias node or injects current to move the core toward the intended operating point. It should then become sufficiently inactive that it does not materially shift the reference or add unwanted noise.
A successful operating-point solve at nonzero current does not establish reliable startup. Check initial conditions, fast and slow supply ramps, brownout recovery, temperature and process corners. Include startup-device leakage and any power-down control; a mechanism that works at room temperature may fail at another corner.
| Design concern | Why it matters | Verification |
|---|---|---|
| Supply headroom | Both mirror and reference devices need valid operating regions | Sweep supply and inspect device voltages |
| Body effect | M2 source is raised by the resistor | Use the actual well/body connections |
| Mirror accuracy | Unequal drain voltages and mismatch disturb equal currents | Device models, corners and Monte Carlo |
| Resistor variation | R sets gm and strongly influences current | Resistance corners and temperature coefficient |
| Reference loading | Added gates and wiring change dynamics | Extracted capacitance and transient settling |
## 4. Verify the bias delivered to the chip
Measure the reference current and gm over process, supply and temperature. Extract supply sensitivity rather than assuming the ideal equations imply perfect supply independence. Check loop dynamics and the stability of the intended operating state with the real bias-node loads.
The schematic’s raised-source transistor also needs enough drain voltage for its intended operation, and the startup network must remain within device limits. If the reference is mirrored into other blocks, verify each output branch’s compliance and matching separately.
The diode-connected MOSFET creates the reference gate voltage, while source degeneration creates the resistor feedback. The beta multiplier closes these relationships into a self-biased system, which adds the startup and loop-verification responsibilities.
## References
- [UNLV CMOSedu: Beta-Multiplier Reference lab](https://cmosedu.com/jbaker/courses/ee420L/s19/students/santid4/Lab9/lab9.htm) — core topology and implementation example.
- [Low-Power Silicon Strain Sensor Based on CMOS Current Reference Topology](https://arxiv.org/abs/2201.13352) — a research implementation discussing beta-multiplier parameter and temperature dependence.