c chart
**A c chart is an attribute control chart used to monitor the number of nonconformities found in inspection units of constant opportunity or size.** It is appropriate when one wafer, die, panel, or other inspected unit can contain more than one defect and the sampling basis remains comparable from point to point.
The c chart distinguishes **nonconformities** from **nonconforming units**. A wafer may contain several particle defects, or a package may contain several visual anomalies. The chart plots the total defect count for each inspection unit rather than reducing that unit to a simple pass or fail result.
For a stable baseline containing $m$ inspection units, the center line is the average count:
$$
\bar{c}=\frac{1}{m}\sum_{i=1}^{m}c_i
$$
Under the usual Poisson model, the three-sigma limits are:
$$
\mathrm{UCL}=\bar{c}+3\sqrt{\bar{c}},\qquad
\mathrm{LCL}=\max\left(0,\bar{c}-3\sqrt{\bar{c}}\right)
$$
The lower limit is truncated at zero because a negative defect count is impossible. If $\bar{c}=4.5$, the calculated upper limit is about $10.86$ and the calculated lower limit is negative, so the plotted LCL becomes zero. A count above the UCL is a signal to investigate, not proof by itself that a particular root cause has been found.
| Situation | Recommended chart | Reason |
|---|---|---|
| Constant wafer area and inspection sensitivity | c chart | Defect opportunity is comparable |
| Different inspected areas, die counts, or sample sizes | u chart | Normalizes defects per unit of opportunity |
| Pass/fail count with constant sample size | np chart | Counts nonconforming units rather than defects |
| Pass/fail fraction with changing sample size | p chart | Normalizes nonconforming units by sample size |
**The constant-opportunity requirement is central.** If inspected wafer area, number of dies, scan recipe, detection threshold, sampling fraction, or review rules change, raw counts are no longer directly comparable. A u chart, stratified baseline, or another model may then be more appropriate. Mixing unlike products, layers, tools, or inspection recipes can create false signals or hide real excursions.
The standard c chart also assumes that counts are approximately Poisson: events occur independently, the underlying rate is stable, and the count variance is close to the mean. Semiconductor defect data often violate these assumptions because particles cluster, wafers share chamber history, spatial zones behave differently, or inspection algorithms create correlated detections. When the observed variance is much larger than the mean, conventional limits can be too narrow and produce excessive alarms. Engineers may need rational subgrouping, root-cause stratification, Laney-style adjustment, or a suitable count regression model rather than mechanically widening limits.
**A useful semiconductor workflow begins with a clean Phase I baseline.** Remove known special-cause periods only with documented technical justification, confirm that the inspection definition is stable, calculate trial limits, and review both individual signals and nonrandom patterns. After the process is demonstrated to be stable, freeze the limits for Phase II monitoring. Recalculating limits after every excursion can train the chart to accept deterioration.
Typical applications include particles per wafer, visual defects per package, void indications per fixed inspection area, and repeated anomalies per fixed microscope field. The c chart should complement defect maps, Pareto analysis, chamber and lot genealogy, tool-state data, and engineering review. A control chart detects a change in the process; it does not identify the physical cause on its own.
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In practice, a c chart is valuable when its counting opportunity and detection system stay fixed. Used with a stable baseline and disciplined reaction plan, it turns defect counts into an early-warning signal without confusing ordinary count variation with a process excursion.