Wanlass Patent Sah Paper Comparison

# Two 1963 Documents, and a Seventeen-Year Wait

the patent, the paper, and the market-share curve that finally caught up to the idea

TWO SEPARATE 1963 RECORDS U.S. PATENT APPLICATION Inventor:Frank Wanlass Assignee:Fairchild Semiconductor Claim:complementary-pair wiring Scope:circuit topology, not a fab process a legal claim on an idea — not a product, not a process recipe IEEE conference paper IEEE CONFERENCE PAPER Authors:Wanlass and Chih-Tang Sah Claim:near-zero standing power Reception:a device curiosity, not a breakthrough Cost:impractical to fabricate at 1963 yields a technical measurement — not a commercial argument two different kinds of record, filed the same year, by overlapping authors — easy to conflate, worth separating this series tracks both through to their separate legal and technical legacies

The patent was a legal claim on a circuit topology; the paper was a technical measurement that read as a device curiosity, not a breakthrough — neither was a commercial argument in 1963.

What changed by 1980 was not the idea — it was VLSI density finally making near-zero standing power worth its fabrication cost at mainstream scale.

THE DORMANCY WINDOW, 1963–1980 mainstream logic-family relevance over time, schematic not measured year → bipolar TTL / NMOS-PMOS mainstream logic, the whole window CMOS — flat for 15-17 years niche only: RCA COS/MOS ships, but stays a sideline 1963 late 1960s 1970s ~1980 VLSI density finally tips the math CMOS's way fabrication cost + speed deficit + niche-only market = ~15-17 years of commercial dormancy handoff at ~1980 to cmos_logic_1980s — fabrication, latch-up, commercial dominance

this series: patent, paper, priority, dormancy (1963-1980) — named, not retold: cmos_logic_1980s covers fabrication, latch-up, commercial dominance

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