Computer Architecture

Computer architecture is where the previous topic's gates finally get assembled into a working CPU, and understanding that assembly explains why programs run at the speed they do. An instruction is a single operation the CPU knows how to perform — add two numbers, load a value from memory, compare two registers — encoded as raw binary the way the data-representation topic described; assembly language is a thin, human-readable layer directly on top of that binary, one line per instruction, with mnemonics like `ADD` or `LOAD` standing in for the actual bit patterns, which is as close to the hardware as a programmer can get without writing 1s and 0s by hand. The CPU executes instructions through a repeating fetch-decode-execute cycle: fetch pulls the next instruction from memory using a register called the program counter, decode figures out which operation it specifies and which registers or memory addresses it touches, and execute actually performs it — addition and comparison run through an arithmetic logic unit built directly from the half-adders and full-adders of the previous topic, while a control unit (also just more logic gates) sequences the whole cycle and decides which hardware components get used on any given step. A register, already introduced as a handful of flip-flops, is the CPU's fastest possible storage — reading or writing one register costs a single clock cycle, with absolutely nothing faster available on the chip. A cache sits directly between the registers and main memory (DRAM, covered in this series' own memory-and-execution topic) as a small, fast layer that keeps a copy of recently used data, because DRAM access is dramatically slower than a register and most programs reuse the same small set of data and instructions repeatedly — a principle called locality — so a cache hit (the data is already there) is far cheaper than a cache miss (the CPU has to wait for DRAM). The memory hierarchy arranges every storage tier available to a computer — registers, then cache, then DRAM, then disk — from fastest-and-smallest at the top to slowest-and-largest at the bottom, and every tier below the top exists purely as a cost tradeoff: faster memory is dramatically more expensive per byte, so a real system layers cheap, large, slow storage underneath small amounts of expensive, fast storage and relies on locality to keep the common case fast. This entire chapter — instructions, the fetch-decode-execute cycle, and the memory hierarchy that feeds it — is the hardware picture the next topic, operating systems, has to manage and share safely across every program running on the machine at once.