current mirror design
**Current Mirrors and Bandgap References** are the **fundamental analog building blocks that generate precise, stable bias currents and reference voltages independent of supply, temperature, and process variations** — forming the infrastructure upon which every analog circuit (amplifier, ADC, DAC, PLL, LDO) depends for stable operation.
**Current Mirror**
- **Purpose**: Copy a reference current from one branch to another (or multiple others).
- **Basic MOSFET Mirror**: Two matched transistors with gates tied together.
- $I_{out} = I_{ref} \times \frac{(W/L)_{out}}{(W/L)_{ref}}$
- Scaling: Wider output transistor → multiplied current.
**Current Mirror Types**
| Type | Output Impedance | Voltage Headroom | Accuracy |
|------|-----------------|-----------------|----------|
| Simple Mirror | Low ($r_o$) | Low ($V_{dsat}$) | ±5-10% |
| Cascode Mirror | High ($g_m r_o^2$) | Medium ($2 V_{dsat}$) | ±1-3% |
| Wide-Swing Cascode | Very High | Medium ($2 V_{dsat}$) | ±0.5-1% |
| Regulated Cascode | Extremely High | Medium | ±0.1-0.5% |
- **Cascode**: Stacks two transistors — dramatically increases output impedance (better current accuracy vs. Vds changes).
- **Wide-Swing**: Modified biasing allows cascode to work at lower supply voltages.
**Bandgap Reference**
- **Purpose**: Generate a voltage reference (~1.2V for Si) that is stable across temperature (-40 to 125°C).
- **Principle**: Combine a CTAT voltage (complementary-to-absolute-temperature, Vbe) with a PTAT voltage (proportional-to-absolute-temperature, ΔVbe).
- $V_{ref} = V_{BE} + K \times \Delta V_{BE} \approx 1.22V$ (silicon bandgap energy at 0K).
- Temperature coefficient: < 10 ppm/°C (< 50 μV/°C).
**Bandgap Reference Circuit**
- Two BJTs (or parasitic BJTs in CMOS) operating at different current densities.
- $\Delta V_{BE} = \frac{kT}{q} \ln(N)$ where N is the current density ratio.
- Op-amp feedback loop forces equal current through both branches.
- Output: Sum of Vbe + amplified ΔVbe = bandgap voltage.
**Design Challenges**
- **Matching**: Transistor mismatch → current mirror error → reference voltage error.
- Mitigation: Large device area, common-centroid layout, dummy devices.
- **Supply Rejection (PSRR)**: Reference voltage must not vary with Vdd changes.
- Cascode mirrors and regulated references improve PSRR.
- **Startup**: Bandgap circuits have a degenerate zero-current stable state — need startup circuit to kick into operating point.
Current mirrors and bandgap references are **the invisible foundation of all analog and mixed-signal circuits** — every amplifier, data converter, oscillator, and regulator on a chip ultimately depends on the accuracy and stability of these bias circuits to function correctly.