DAC Glitch Impulse

# DAC Glitch Impulse: A Small Code Step Can Hide a Large Spike

DAC glitch impulse describes the transient output error associated with updating a digital-to-analog converter, commonly quantified as a voltage-time area in nV·s. It complements settling time and peak excursion: a single area value cannot fully describe the disturbance seen by a fast circuit.

A DAC may have excellent static linearity and still produce a short update transient. The useful question is whether that transient matters during the interval when the receiving circuit observes the output.

## 1. Follow the switching sequence

Switching skew creates a DAC major carry transientConceptual 011-to-100 transition. Weight four turns on before weights two and one turn off, temporarily giving seven units rather than the final four. Dashed green output is an ideal synchronized step. Timing and amplitudes are illustrative.Same final step. Different transient path.Conceptual 3-bit binary DAC · code 011 → 1004I branch2I branch1I branchOutput / ITime →3I4I final7I temporaryEarly MSB turn-on briefly adds to the old lower bits.Illustration only: real outputs have finite bandwidth and settling.

*Idealized binary-weighted current example, not a transistor simulation. The timing difference is exaggerated. The green dashed trace shows a synchronized reference step; the yellow trace illustrates an early most-significant branch.*

Code 011 selects weights 2I and I, while code 100 selects 4I. If the 4I branch turns on before the old branches turn off, the temporary sum is 7I. Reverse the event ordering and a temporary undershoot is possible. Actual output bandwidth rounds these edges, and switch charge injection, parasitic coupling and the output stage also shape the waveform.

This is a major-carry transition: many weighted controls change for a one-LSB desired step. Thermometer coding can reduce the number of changing unit selections, while segmented DACs combine unary and binary sections. Neither architecture name alone specifies the resulting glitch.

## 2. Define what is integrated

Signed and absolute DAC glitch impulse areasCalculated error waveform with a positive triangular pulse of thirty millivolts and two hundred nanoseconds base, followed by a negative twenty millivolt triangular pulse with the same base. Signed areas plus three and minus two nanovolt seconds yield net one and absolute five nanovolt seconds. Not measured device data.Measure the area, then inspect the peakError e(t) = measured output − stated reference responsee(t)Time →+30 mV−20 mV200 ns base200 ns basePositive area: +3 nV·s½ × 30 mV × 200 nsNegative area: −2 nV·s−½ × 20 mV × 200 nsNet area = 1 nV·s · absolute area = 5 nV·sCancellation in the integral does not erase the 30-mV peak.

*Calculated piecewise-linear example, with independently specified peak heights and base durations. It illustrates area conventions; it is not a manufacturer specification or measured waveform.*

Define an error waveform e(t) relative to a stated reference response, then specify an integration window from t1 to t2. Its signed area is G = ∫ e(t) dt. The absolute area ∫ |e(t)| dt counts both polarities positively. These quantities are different when the transient crosses the reference.

For the example, the positive triangle has area ½ × 30 mV × 200 ns = 3 nV·s. The negative triangle contributes −2 nV·s. Their signed sum is 1 nV·s, while their absolute areas sum to 5 nV·s. The largest absolute excursion remains 30 mV. A lower net area can therefore coexist with a larger instantaneous error.

Read the device’s definition before comparing numbers. Determine whether the published value uses net area, an absolute-area convention or another specified extraction method. State how the intended code step, propagation delay and settling response are treated; otherwise the integration may include part of the wanted signal.

Despite the frequent name “glitch energy,” V·s is not a joule. Electrical energy dissipated in a known resistance would involve integrating voltage squared divided by resistance, with appropriate treatment of the wanted signal. A voltage-time impulse area by itself does not establish that energy.

## 3. Separate three observations

  • Glitch impulse area: integrates the defined transient error over a stated interval.
  • Peak excursion: reports the largest relevant positive or negative error, which can trigger a fast receiver even if signed areas cancel.
  • Settling time: reports when the output reaches and remains within a stated band around its final value, under specified conditions.

Digital feedthrough is another disturbance: digital interface activity couples to the analog output even when a core update is withheld. Where hardware supports separate write and update events, delaying the update after a write can help distinguish the two contributions. Both may be present during normal operation.

A major-carry test is useful but does not prove the worst case across all codes. Device topology, internal timing and parasitics determine which transitions are most troublesome.

## 4. Measure with a reproducible reference

Record the two codes, transition direction, update timing, reference voltage, supplies, load and temperature. Trigger from a defined update event and specify oscilloscope bandwidth, sample rate, probe loading and any amplification or coupling used. Verify that the instrument captures the short transient without clipping and that its own response is understood.

Select a stable baseline and a window that captures the relevant lobes and tails. For sampled error values, numerical integration can use the trapezoidal sum of neighboring values multiplied by their time separation. Repeat with modestly changed window limits to reveal baseline sensitivity. A constant baseline error contributes an area proportional to window duration, so a long capture is not automatically more accurate.

AC coupling can suppress a large DC output level but changes low-frequency response. Averaging improves repeatable-waveform visibility while potentially hiding nonrepeatable timing variation. Preserve representative single-shot and averaged results when both matter. Do not compare measurements made with different extraction conventions as if they were interchangeable.

## 5. Choose mitigation for the receiving circuit

Coordinated switching, segmentation and careful routing can reduce the disturbance at its source. Filtering can lower peak amplitude while extending the response; it must be checked against settling and signal-band requirements. A unity-DC-gain linear filter can preserve signed pulse area when the entire response is integrated, so reducing the visible peak does not necessarily reduce that integral.

A sample-and-hold or a scheduled observation interval can avoid an update transient if acquisition and settling requirements are met. Evaluate the complete DAC, buffer, filter and load path. A fast comparator may care about the peak; a sampled precision channel may care about residual error at acquisition; periodic updates may generate spectral lines or an average offset depending on the actual sequence and signed response.

## References

  • [Analog Devices AN-1444: Second-Order Effects to Consider for Continuous Precision DAC Updates](https://www.analog.com/en/resources/app-notes/an-1444.html) — update transients, digital feedthrough and code-dependent behavior.
  • [Texas Instruments: Analog Applications Journal, slyt300](https://www.ti.com/lit/an/slyt300/slyt300.pdf) — positive/negative glitch-area accounting and output-filter tradeoffs.

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