DAC Zero Order Hold

# DAC Zero-Order Hold: Why a Staircase Has a Sinc Response

A zero-order hold (ZOH) keeps each sample value constant for one update period. It is a useful ideal model of a conventional non-return-to-zero DAC output. The held waveform is continuous in time but piecewise constant in amplitude; it is not a line drawn between the sample points.

This simple time-domain behavior has a predictable frequency response. The finite-width rectangular hold attenuates higher-frequency components with a sinc envelope and introduces a linear phase term. It does not remove all spectral images.

## 1. Follow one update interval

*Illustrative sample sequence, not measured DAC data. Transitions are instantaneous in this model. Real DAC settling, glitch impulse, noise and jitter require additional models.*

With update rate fs and period T = 1/fs, the output equals x[n] from nT up to the next update. Each sample therefore contributes a rectangular pulse of width T, beginning at its update instant. Adding those pulses produces the staircase.

The hold does not require an explicit external capacitor in every implementation. A DAC can maintain the decoded analog state between clock events. What matters for this model is the waveform, not a particular circuit topology. Return-to-zero and other output pulse modes have different responses.

## 2. Read the frequency response

*Calculated ideal ZOH magnitude on linear axes, normalized to unity at DC. The curve is a continuous response envelope; it does not claim that a particular sample sequence contains energy at every frequency.*

Using normalized DC gain, H(f) = exp(−jπfT) × sin(πfT)/(πfT), with the limiting value H(0) = 1. The magnitude is the absolute value of the sinc factor. The exponential contributes the phase corresponding to a T/2 delay in the first lobe; a real DAC may add other latency and phase response.

At f = 0.1fs, the magnitude is approximately 0.984, or −0.14 dB. At 0.25fs it is about 0.900, or −0.91 dB. At 0.5fs, the limiting first-zone magnitude is 2/π ≈ 0.637, or −3.92 dB. These figures come directly from the ideal formula, not a device specification. Exactly at Nyquist, the discrete-time sinusoid also has special phase-dependent behavior; the envelope value is not a guarantee of reproducing an arbitrary Nyquist-frequency sinusoid.

Some derivations give the rectangular pulse response a DC gain T rather than one. That reflects the normalization of the impulse-train model. Compare like normalizations when checking equations; the relative sinc droop remains the same.

## 3. Distinguish droop from images

A sampled sinusoid produces spectral replicas at frequencies related to integer multiples of fs. For a tone f0 strictly between zero and fs/2, positive-frequency images include fs − f0 and fs + f0. The hold weights those components by its response at their actual analog frequencies.

For example, f0 = 0.1fs has a first image at 0.9fs. The ideal envelope there is about 0.109, versus 0.984 at the desired tone. Under the ideal replicated-spectrum model, the image is about 19.1 dB below that desired component before any additional filtering. A sinc zero exactly at fs does not suppress every frequency near fs.

Droop describes attenuation across the desired band. Imaging describes unwanted spectral replicas. A reconstruction filter is selected for the wanted band, image rejection, phase and settling requirements. The hold by itself is not an ideal brick-wall low-pass filter.

## 4. Apply equalization within a useful band

An inverse-sinc equalizer can compensate some passband droop over a specified frequency range. It does not provide unlimited correction: the ideal inverse diverges at the sinc zeros. Compensation also uses signal headroom and can change noise or out-of-band behavior, depending on where and how it is implemented.

Digital interpolation raises the sample rate delivered to the DAC core and can move images farther from the wanted band. Recompute the hold response using the actual core update rate and the selected pulse mode, rather than an upstream interface rate. Interpolation filtering, equalization and analog reconstruction filtering perform related but distinct tasks.

## 5. Keep the ideal hold separate from circuit errors

A real output combines the hold behavior with finite bandwidth, package and load effects, DAC settling time, DAC glitch impulse, clock jitter and nonlinear distortion. An ideal staircase model cannot predict those effects. Likewise, a measured rolloff is not automatically all sinc droop; the output network may contribute substantial frequency dependence.

Check output compliance for current-output interfaces, loading and amplifier bandwidth for voltage-output paths, and the response of transformers or reconstruction filters. Use measured amplitude and phase across the actual signal band to validate the combined model.

## 6. Verify the waveform and spectrum together

State sample rate, pulse mode, code sequence, output termination and measurement bandwidth. For spectral measurements, use suitable coherent sampling or windowing and distinguish images from harmonics and clock feedthrough. Normalize the ideal envelope consistently before comparing it with data.

Inspect time-domain updates to confirm the assumed hold interval and pulse shape. Then compare the expected desired-tone droop and image locations with the measured spectrum. A good model explains both views with the same update rate and output mode.

## References

• [Analog Devices: Equalizing Techniques Flatten DAC Frequency Response](https://www.analog.com/cn/resources/technical-articles/2022/07/16/09/40/equalizing-techniques-flatten-dac-frequency-response.html) — held outputs, sinc attenuation and equalization.
• [Texas Instruments: High-speed DAC output response in NRZ, RZ and RTC modes](https://www.ti.com/ko-kr/video/5577272810001) — reconstruction pulse shapes and their frequency responses.