dark silicon

Dark silicon is the fraction of a chip that must be left unpowered — kept dark — at any given moment because the whole die cannot be switched on within its power and thermal budget. Modern nodes can pack far more transistors onto a die than the chip is allowed to energize simultaneously, so a growing share of the silicon sits idle at any instant. The transistors are physically there; the power budget, not the area, is what limits how many can run at once.\n\n**It is the direct consequence of Dennard scaling ending.** For decades Dennard scaling let supply voltage fall as transistors shrank, so power per unit area stayed roughly constant even as density doubled each node. Around the mid-2000s that broke: voltage could no longer scale down proportionally, so each new node crams more transistors into the same area without a matching drop in power-per-transistor. Density kept rising; power density rose with it. The chip's fixed thermal envelope then caps how much can be active, and the surplus becomes dark silicon.\n\n**The dark fraction grows with every node.** Because transistor count per area climbs faster than the power budget, the share of the die you can light up at full speed shrinks generation over generation — estimates put it from a modest fraction at older nodes toward the majority of the die at the leading edge. This is why simply adding more identical cores stopped translating into proportional performance: you cannot power them all at once, so throughput is bounded by heat and current delivery, not by how many cores you printed.\n\n| | Dennard era | Post-Dennard (dark silicon) |\n|---|---|---|\n| Voltage vs shrink | scales down | ~flat |\n| Power / mm² | ~constant | rises each node |\n| Limit on active area | area / count | power & thermal budget |\n| More cores → | more usable throughput | many must idle |\n| Design response | scale frequency | specialize, gate, dim |\n\n```svg\n\n```\n\n**The design answer is specialization and gating, not more uniform cores.** If most of the die must stay dark, the winning move is to fill that area with blocks that are only powered when their specific job runs — dedicated accelerators, fixed-function engines, extra cache — plus aggressive power gating, clock gating, multi-voltage domains, and dynamic voltage/frequency scaling to keep active power under the cap. Dark silicon reframes area as cheap and power as the scarce resource: you spend transistors to build many specialized units and light up only the few you need for the workload at hand.\n\nRead dark silicon through a quant lens rather than a 'wasted area' lens: the binding budget is watts and junction temperature, not square millimeters, so the number that matters is the fraction of the die you can energize within the thermal envelope — and that fraction falls each node as density outruns Dennard-limited power. The design question becomes performance-per-watt within a fixed power cap: which specialized blocks earn their area by delivering the most useful work per joule when lit, since everything else has to stay dark anyway.