DRAM-Scaling-1974 Step 18 Trace Refresh Power Cost as Capacitance Shrinks

# Trace the Refresh-Power Cost That Grows as This Series' Own Capacitance Shrinks

This project's `dram_1968` series established refresh as an obligation tied to leakage and retention time; as this series' own capacitance-recovery steps show, $C_s$ under scaling pressure keeps shrinking even after trench and stacked geometry recover what pure planar scaling could not — and that shrinkage has a refresh-power consequence worth naming explicitly.

## 1. Connect This Series' Capacitance Argument to Refresh Power Directly

`dram_1968`'s own Step 6 set a refresh interval from a retention-time measurement; it did not need to address how much energy each refresh cycle consumes, because at that series' own cell sizes, refresh power was a secondary concern relative to the architecture's basic feasibility. As this series' trench and stacked geometries (Steps 3, 4) recover capacitance generation after generation but never fully restore it to earlier, larger-cell-era absolute values, the charge $Q_s = C_s V_{dd}$ each refresh cycle must restore keeps shrinking in absolute terms even as the *number* of cells needing refresh keeps growing with density — a tension this series' own numbers, not `dram_1968`'s, actually produce.

Trace the Refresh-Power Cost That Grows as This Series' Own Capacitanc Step 18 — dram-scaling-1974 Connect This Series' Capacitance Argument to Ref see Section 1 State the Resulting Tension Directly see Section 2 Hand This Tension to Where It Is Actually Resolv see Section 3 THREE-PART ARGUMENT, ONE STEP dram-scaling-1974 extension, step 18 of this project's DRAM lineage

## 2. State the Resulting Tension Directly

Total refresh power scales with the number of cells refreshed per unit time, not with the charge per cell alone, so rising density (more cells, Step 1's own crisis) pushes total refresh power up even as per-cell charge trends down. This is a genuine tension this series' own geometry work (recovering $C_s$) only partially offsets — it keeps individual cells functional, but does not reduce the aggregate refresh burden an increasingly dense array represents.

Step 18 in the Dram-Scaling-1974 Lineage what this step inherits and what it hands forward, by name Step 18 this step Inherits prior steps Hands Off named thread NO CELL-PHYSICS OR ARCHITECTURE RE-ARGUED each step adds a distinct angle; none re-derive settled prior content

## 3. Hand This Tension to Where It Is Actually Resolved

This series does not resolve the refresh-power tension it names here — on-chip refresh scheduling and automation, built specifically to manage this exact kind of aggregate obligation, is this project's `dram64k_1979` series' own subject (its Step 5), at a generation contemporaneous with this series' own technical story. Naming the tension honestly here, as a direct consequence of this series' own capacitance work rather than of `dram_1968`'s cell physics, keeps the two series' boundaries clean while still tracing the real connection between them.

Take dram-scaling-1974 step 18 trace refresh power cost as capacitance shrinks further

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