dynamic voltage frequency scaling (dvfs)

**Dynamic Voltage and Frequency Scaling (DVFS)** is the technique of **simultaneously adjusting both the supply voltage and clock frequency** of a processor or functional block at runtime — scaling up for demanding workloads (high voltage, high frequency) and scaling down during light activity (low voltage, low frequency) to minimize energy consumption. **The DVFS Principle** - **Frequency scales with voltage**: Maximum achievable frequency is proportional to voltage (approximately). To run faster, increase voltage. To run slower, voltage can be reduced. - **Power scales cubically with frequency/voltage**: Since $P = \alpha C V_{DD}^2 f$ and $f \propto V_{DD}$, reducing both together yields approximately $P \propto V_{DD}^3$. - **Huge savings**: Running at 50% frequency and corresponding voltage reduces power to roughly **12.5%** of full power — an 8× reduction. **How DVFS Works** 1. **Workload Detection**: The operating system or firmware monitors CPU utilization, task queue depth, or performance counters. 2. **P-State Selection**: Based on workload, select an appropriate performance state (P-state): - **P0**: Maximum frequency and voltage — full performance. - **P1**: Reduced frequency/voltage — moderate workload. - **P2, P3...**: Progressively lower — light workloads. - **Pn**: Minimum operational frequency/voltage — lightest load. 3. **Voltage Transition**: Request the new voltage from the power regulator. Wait for voltage to stabilize. 4. **Frequency Transition**: Adjust the PLL/clock divider to the new frequency. - **Voltage increase**: Raise voltage FIRST, then increase frequency (higher frequency needs higher voltage). - **Voltage decrease**: Lower frequency FIRST, then reduce voltage (prevent operating above the voltage's maximum frequency). **DVFS Operating Points** | P-State | Voltage | Frequency | Power (relative) | |---------|---------|-----------|------------------| | P0 | 1.0V | 2.0 GHz | 100% | | P1 | 0.9V | 1.6 GHz | 58% | | P2 | 0.8V | 1.2 GHz | 31% | | P3 | 0.7V | 0.8 GHz | 14% | **DVFS in Practice** - **Mobile SoCs**: Aggressive DVFS with 10+ P-states — critical for battery life. Phone CPUs spend most time at low P-states. - **Server Processors**: DVFS balances performance per watt — scale down lightly loaded cores, scale up under burst demand. - **GPU**: Graphics processors use DVFS extensively — high performance for gaming/rendering, low power for desktop. - **Operating System Integration**: Linux (cpufreq governors), Windows (power plans), Android (interactive governor) all control DVFS. **DVFS Governors/Policies** - **Performance**: Always maximum frequency. No power savings. - **Powersave**: Always minimum frequency. Maximum battery life. - **Ondemand/Interactive**: Dynamically adjust based on load — ramp up quickly when load increases, ramp down when idle. - **Schedutil**: Linux scheduler-driven DVFS — uses scheduler's per-CPU utilization data for P-state decisions. **DVFS + AVS** - DVFS selects the **target frequency** based on workload. - AVS then finds the **minimum voltage** for that frequency on this specific chip. - Together they provide both workload adaptation and per-chip optimization. DVFS is the **most widely deployed power management technique** in computing — from smartphones to data centers, it enables processors to deliver performance on demand while minimizing energy consumption during idle or light workloads.

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