Early Voltage

Early voltage is the number that tells you how far a bipolar transistor is from being the perfect current source its saturation-region model pretends it is. Push a BJT's collector-emitter voltage higher while holding base-emitter voltage fixed, and collector current does not stay flat — it creeps upward, gently, exactly the way a MOSFET's drain current creeps upward past saturation. Extrapolate that gentle slope backward on an I_C-vs-V_CE plot and every curve, regardless of which base-emitter voltage produced it, crosses the V_CE axis at the same single point: a negative voltage called −V_A, the Early voltage.

The physical cause is base-width modulation, the direct bipolar analog of what shrinks a MOSFET's channel past pinch-off. A BJT's collector-base junction is reverse-biased in normal active operation, and like any reverse-biased junction it has a depletion region whose width grows as the reverse bias across it grows. Raising V_CE while V_BE stays fixed widens that collector-base depletion region, and because the depletion region eats into the neutral base on one side, the effective, undepleted base width the carriers actually have to cross shrinks. A narrower base collects a higher fraction of the emitter's injected carriers before they can recombine, which raises collector current — not because V_BE changed, but because the base got physically thinner underneath a junction that never moved.

The convergence point is not a coincidence of the plot — it falls directly out of how collector current depends on base width in the transistor's own current equation. Collector current is inversely proportional to the effective base width, and to first order that width decreases linearly with V_CE in the active region; writing the resulting linear relationship out and asking where the extrapolated line crosses zero current produces a single voltage independent of V_BE, because the slope and the extrapolated intercept both trace back to the same base-width-vs-V_CE relationship. Every constant-V_BE line on the plot has a different slope, since higher collector current means a steeper absolute rise for the same relative base-width change, but all of them point back to identical −V_A, which is a property of the transistor's base doping profile and width, not of whatever bias point happens to be plotted.

Early voltage sets output resistance the same way channel-length modulation's λ does, and it is used the same way in every gain calculation. The small-signal output resistance looking into the collector is r_o = V_A / I_C — not infinite, as the ideal current-source model assumes, but a real, finite value that falls as bias current rises for a fixed V_A. A common-emitter or common-base gain stage's intrinsic voltage gain is proportional to g_m·r_o, so a transistor with a larger Early voltage delivers more gain at the same bias current, which is exactly why V_A is published as a headline parameter in any bipolar process design kit and why analog designers compare processes partly on how large a V_A their vertical BJTs can deliver.

Process geometry is the practical lever, and it is why a vertical, discrete-style BJT structure usually beats a small-geometry lateral device on this one number. A wider, more lightly doped base resists depletion-region encroachment better than a narrow, heavily doped one, so V_A tends to run from the tens of volts in compact integrated bipolar devices up into the hundreds of volts for well-optimized vertical structures — process choices made for entirely different reasons, like base doping profile and base width set by the epitaxial growth step, end up determining this analog figure of merit as a side effect. This is the same tradeoff channel-length modulation forces on MOSFETs: a device optimized for density and speed gets a worse Early voltage or a worse λ, and a device deliberately built wider or more lightly doped to hold r_o up pays for it in area or switching speed.

Cascoding defeats both effects through the identical circuit mechanism, because both effects are triggered by the same thing: a large voltage swing landing on the terminal that controls the depletion region or the pinch-off point. Stacking a second transistor in a cascode configuration holds the bottom device's collector-emitter or drain-source voltage nearly constant regardless of what the output node does, denying either effect the voltage swing it needs to modulate base width or channel length in the first place. The underlying physics is not removed — the base-collector junction still depletes, the channel still pinches off closer to the source as bias changes — the circuit topology simply stops exposing the sensitive terminal to the swing that would make either process matter.

Early voltage is proof that two completely different device families — one built around a forward-biased emitter junction and carrier diffusion, the other around a gated inversion channel — arrive at the identical circuit-level limitation from different physical starting points. A BJT's base and a MOSFET's channel are not the same structure, modulated by different voltages through different junctions, but both produce a finite output resistance that caps gain the same way, is specified the same way, and is defended against the same way — which is exactly why an analog designer moving between bipolar and CMOS processes finds this particular fight waiting on both sides of the fence.