eda (electronic design automation)

Electronic Design Automation software enables engineers to **design, simulate, verify, and prepare semiconductor chips** for manufacturing. Without EDA tools, modern chip design (billions of transistors) would be impossible. **EDA Tool Categories** **RTL Design**: Write hardware description language (Verilog/VHDL). Tools: text editors, linting. **Logic Synthesis**: Convert RTL to gate-level netlist. Tools: Synopsys Design Compiler, Cadence Genus. **Place & Route**: Physical layout of standard cells and routing. Tools: Synopsys ICC2, Cadence Innovus. **Verification**: Confirm design correctness. Tools: Synopsys VCS, Cadence Xcelium (simulation); Synopsys Formality (formal verification). **Physical Verification**: DRC, LVS, antenna checks. Tools: Synopsys ICV, Cadence Pegasus, Siemens Calibre. **Analog/Mixed-Signal**: Schematic and layout for analog circuits. Tools: Cadence Virtuoso. **DTCO**: Design-Technology Co-Optimization for advanced nodes. **Major EDA Vendors** • **Synopsys**: #1 market share. Strong in synthesis, P&R, verification, IP. • **Cadence**: #2. Strong in analog, custom design, P&R, signoff. • **Siemens EDA (Mentor)**: #3. Strong in physical verification (Calibre), DFT, PCB. **Design Flow** Spec → RTL → Synthesis → Floorplan → Place → CTS → Route → Signoff (timing, power, DRC, LVS) → Tape-Out → Mask Data Preparation