electromigration aware routing

**Electromigration-Aware Routing and Signoff** is **the design methodology that ensures all on-chip interconnects can sustain their required current densities over the product's operational lifetime without metal void formation or hillock growth that would cause open or short circuits** — requiring current density analysis at every metal segment and via with width adjustments, redundant vias, and routing modifications to meet electromigration (EM) reliability specifications. **Electromigration Physics:** - **Mechanism**: direct current flowing through a metal interconnect transfers momentum from electrons to metal atoms through the electron wind force, causing net atomic migration in the direction of electron flow; this mass transport creates voids at cathode ends (upstream) and hillocks at anode ends (downstream) of the conductor - **Black's Equation**: the mean time to failure (MTF) follows MTF = A × J^(-n) × exp(Ea/kT), where J is current density, n is the current density exponent (typically 1-2), Ea is the activation energy (0.7-1.0 eV for copper), and T is temperature; EM lifetime drops exponentially with increasing temperature and polynomially with increasing current density - **Critical Length**: metal segments shorter than the Blech length (typically 10-50 μm for copper at advanced nodes) are immune to EM failure because the back-stress gradient from atomic pileup reaches equilibrium before void nucleation; short segments can carry higher current densities without EM concern - **Failure Modes**: void formation at via bottoms causes resistance increase and eventual opens; void growth across the full line width creates hard opens; hillock extrusion into adjacent lines creates shorts; failure mode depends on via-to-line geometry and stress gradient direction **Current Density Limits:** - **DC Current**: continuous unidirectional current has the most severe EM impact; typical DC current density limits for copper are 1-3 MA/cm² at 105°C junction temperature for a 10-year lifetime target - **AC and Bidirectional Current**: alternating current partially reverses atomic migration, providing a healing effect; the EM limit for bidirectional signals is typically 2-5 times higher than DC, depending on the duty cycle and frequency - **RMS vs Average**: signal wires carry time-varying current; EM analysis uses average current for unidirectional (clock, power) and RMS-weighted average for bidirectional (data) paths; accurate activity factor estimation is critical for realistic EM assessment - **Temperature Dependence**: EM lifetime is extremely sensitive to temperature due to the exponential Arrhenius term; a 10°C increase in junction temperature can reduce EM lifetime by 2-3 times, making thermal analysis an integral part of EM signoff **Routing and Signoff Practices:** - **Wire Widening**: critical nets carrying high current (power rails, clock trunks, high-activity data buses) are widened beyond minimum width to reduce current density below the EM limit; width is calculated from the maximum expected current and the technology's EM current density specification - **Redundant Vias**: inserting multiple vias at each via location reduces the current density per via and provides redundancy against single-via failure; redundant vias improve both EM lifetime and manufacturing yield - **Metal Layer Assignment**: higher metal layers with thicker conductors and wider minimum widths are assigned to high-current nets; power grid design uses the widest available upper metal layers for supply distribution - **EM Signoff Tools**: Synopsys IC Compiler II, Cadence Innovus, and dedicated reliability tools (Ansys RedHawk, Synopsys CustomSim) analyze current density in every segment and flag violations; vectorless analysis estimates switching currents from toggle rates, while vector-based analysis uses actual simulation waveforms Electromigration-aware routing and signoff is **the reliability discipline that ensures interconnect longevity by constraining current density within safe limits at every metal segment and via — preventing field failures that would otherwise shorten product lifetime below the 10+ year reliability requirement of automotive, server, and infrastructure applications**.