Fault Injection Attack

A fault injection attack deliberately disturbs a chip's power, clock, or physical environment at exactly the right instant to make it compute a wrong answer on purpose, and that single corrupted instant can be enough to skip a security check or leak a cryptographic key the chip was never supposed to give up. Where differential power analysis listens passively and never touches the chip's operation, fault injection is the active counterpart — it reaches in and perturbs the circuit itself, then reads meaning out of exactly how the chip breaks.

The simplest version of this attack needs nothing more exotic than a brief power glitch. Dropping the supply voltage for a few nanoseconds, or injecting a single extra clock edge right when a processor is fetching an instruction, can cause that instruction to be skipped or misread entirely — if that skipped instruction happened to be the conditional branch that checks whether a PIN was correct, the chip simply proceeds as if the check passed, with no cryptography broken and nothing mathematically wrong, just one instruction that never actually ran.

At the cryptographic end of this spectrum, fault injection stops trying to skip anything and instead corrupts a calculation just enough to read the key from the mistake. Differential fault analysis (DFA) injects a fault partway through an AES or RSA computation and compares the resulting faulty ciphertext against a correct one from the same input; the mathematical structure of the faulty difference reveals key bits the same way DPA's statistical correlation does, which is why the two techniques are often described as passive and active siblings of the same underlying threat to secret-key hardware.

Laser fault injection is the precision tool when a glitch on the power or clock pin isn't targeted enough. A focused laser pulse aimed at a specific transistor on a decapsulated chip can flip a single bit at an exact physical location and an exact clock cycle, giving a researcher far more control than a global voltage or clock glitch provides — open-source platforms like ChipWhisperer have made the glitching side of this research accessible well beyond specialized labs, which is part of why fault-injection resistance has become a standard line item in secure-element certification rather than a niche academic concern.

Defending against this means detecting the disturbance, not just hardening the math. Secure microcontroller vendors such as Infineon, NXP, and Thales build in dedicated voltage, clock, and light sensors that trigger a reset or wipe secrets the instant they detect an out-of-spec glitch, and sensitive operations are often computed redundantly in parallel so a single injected fault produces a mismatch between two independent results instead of a silently accepted wrong answer — the defense has to catch the disturbance itself, because by the time the faulty output exists, the information it leaks is already irreversible.

Read a fault injection attack through a *make-it-break-on-purpose* lens rather than a *bug-exploitation* lens — nothing about the chip's design was ever flawed in the way a software vulnerability is, the attacker is simply forcing a correctly designed circuit into a brief, precisely timed moment of incorrect operation and then reading meaning out of exactly how it failed.