Glass Core Substrate
A glass core substrate replaces the organic resin panel at the center of a chip package with a sheet of actual glass, and that one material swap is what lets packages hold flatter and route denser than anything built on BT or ABF cores today. At a panel level the build looks like this:
Flatness is the whole argument for switching materials. Organic build-up (BT or ABF) cores have a coefficient of thermal expansion around 16-18 ppm/K, while a glass core sits at roughly 3-7 ppm/K depending on composition — much closer to silicon's 2.6 ppm/K. That mismatch is why large organic substrates warp and bow after reflow: as panel sizes grow past roughly 50mm per side to carry bigger GPU and accelerator packages, the organic core can no longer hold flat enough for fine-pitch flip-chip attach, and warpage becomes the yield-limiting defect rather than any single process step. Glass barely moves across that same thermal swing, which is the direct reason Intel has publicly targeted glass core substrates for its own packages around 2030, and why Samsung Electro-Mechanics and SKC's substrate subsidiary Absolics have each built pilot lines around the material — Absolics broke ground on a roughly $600 million glass substrate plant in Covington, Georgia specifically to get ahead of that transition.
Through-glass vias (TGV) are the hard new process step that didn't exist on organic cores. Glass can't be mechanically drilled and plated the way organic cores are; instead a laser — typically from equipment suppliers like Disco or LPKF — forms via holes through the sheet, which are then seeded and copper-electroplated to make the vertical electrical connection between the top and bottom RDL stacks. Production TGV diameters run around 20-40 microns with aspect ratios near 10:1, and getting uniform copper fill through a hole that deep without voiding is itself a qualification hurdle equipment makers like Applied Materials and Lam Research are actively tooling for.
The real payoff is routing density, not just flatness. Because glass holds dimension precisely through lithography and etch, RDL line/space on a glass core can reach roughly half the pitch of an equivalent organic build-up layer, which means more I/O and power rails fit under the same package footprint — exactly what multi-die GPU and HBM-heavy AI accelerator packages need as reticle-limited compute dies get surrounded by more memory and chiplets. Glass panels can also be processed at much larger format, up to roughly 515mm by 510mm versus the roughly 300mm-wide strip format organic substrate lines use, so more substrate units come off a single panel — a direct cost lever once yields mature.
Yield, not physics, is the current blocker. TGV crack propagation during panel singulation, copper void formation inside the via fill, and warpage that still shows up at the very large panel formats glass is meant to enable are the open reliability problems packaging houses are working through before glass core substrates reach high-volume logic and HBM-adjacent packages. Equipment vendors are treating this the way the industry treated early through-silicon vias a decade earlier: as a yield-learning curve rather than a fundamental barrier, with Tokyo Electron, Disco, and Applied Materials all running qualification programs on TGV drill, fill, and CMP steps. Read glass core substrates through a flatness-enables-density lens rather than a simple material-swap lens — the glass itself is the enabling step that lets the denser routing, bigger panels, and tighter package warpage specs that reticle-limited AI accelerator packages now demand actually hold together through assembly.