hdp cvd

**High-Density Plasma CVD (HDP-CVD)** is the **simultaneous deposition and sputter-etch of SiO₂ via inductive-coupled-plasma (ICP) source and RF biased substrate — enabling void-free gap-fill of high-aspect-ratio structures (STI, metal via, spacer) by breaking up voids through ion bombardment**. HDP-CVD revolutionized interconnect and isolation technology. **ICP Plasma Source and Sputter Mechanism** HDP-CVD uses an inductive-coupled-plasma (ICP) source to generate high-density plasma (~10¹¹-10¹² cm⁻³ electrons, vs ~10⁹ in conventional PECVD). The ICP is decoupled from the substrate RF bias, allowing independent control of plasma density (via ICP power) and ion energy (via substrate RF bias). During deposition, SiH₄ + O₂ precursors decompose in the dense plasma, producing SiO₂. Simultaneously, RF bias accelerates ions (Ar⁺) toward the substrate, sputtering (removing) deposited oxide. This simultaneous deposition-sputter process breaks up void fronts by: (1) reducing stress at void tips (sputtering relieves stress), (2) smoothing void surfaces (sputtering removes pointed edges), and (3) redirecting deposited material around voids. **Gap-Fill of High-Aspect-Ratio Features** HDP-CVD is unmatched for filling trenches with AR > 6:1. Example: STI gap fill in 28 nm node with 120 nm trench depth, 15 nm width (AR = 8:1) is filled void-free via HDP-CVD in a single step, where conventional PECVD would leave voids. The sputter-to-deposition ratio (S/D ratio, tuned via RF bias power) is optimized empirically: low S/D (high deposition, low sputter) fast-fills but risks voids; high S/D (low deposition, high sputter) is slow but void-free. Typical S/D ratio is 1:2 to 1:5 (1 part sputter, 2-5 parts deposition). **STI Void Elimination** Shallow trench isolation (STI) uses HDP-CVD as the primary gap-fill method. Prior to HDP-CVD, O₃-TEOS SACVD fills most of the trench. HDP-CVD then fills remaining voids and planarizes in one step. STI voids cause leakage between adjacent transistors and must be eliminated for yield. HDP-CVD has reduced STI void rate from ~1-5% (with FCVD) to <0.1%, enabling aggressive STI pitch scaling. **Argon Sputter Damage** The ion bombardment (Ar⁺ at 100-300 eV typical) can cause shallow subsurface damage in sensitive structures. Channeling of ions and generation of vacancies/interstitials degrade interface quality. At the Si/SiO₂ interface, this increases interface trap density (Dit increase ~10¹⁰ cm⁻² eV⁻¹) and degrades device characteristics. Mitigation includes: reduced RF bias (lower ion energy, but slower fill), post-HDP hydrogen anneal, and protective capping layers. **Film Stress Control** HDP-CVD oxide exhibits tensile stress (typically 100-200 MPa) due to the ion bombardment densifying the film. Unlike PECVD (intrinsic stress compressive or tensile depending on H content), HDP stress is more difficult to control. Excessive stress causes wafer bowing and can delaminate films. Stress can be partially controlled by adjusting deposition conditions (temperature, precursor ratio, plasma power) but remains a design constraint. **TEOS Precursor Alternatives** While SiH₄ + O₂ is the primary precursor, some HDP-CVD tools use TEOS as precursor (TEOS-HDP). TEOS-HDP provides similar gap-fill performance with potentially lower impurity (carbon) due to cleaner precursor. However, TEOS vapor handling is more complex, and tool throughput may be reduced. **Sputter Etch Rate and Selectivity** The sputter component etches both SiO₂ and other materials (SiN, photoresist, metal). During gap fill, the photoresist mask is partially sputtered (eroding); selectivity of SiO₂ sputter to photoresist is ~1:2 to 1:1. This limits process margin and requires thicker photoresist or shorter sputter times. In-situ hardmask (SiN) can improve selectivity. **Post-HDP CMP and Planarization** After HDP-CVD, surface is non-planar (wavy topography from simultaneous deposition-sputter). Chemical-mechanical polishing (CMP) removes this topography and exposes tungsten plug or gate. HDP oxide is harder and denser than SACVD oxide, requiring more aggressive CMP (higher pressure, stiffer pad). Dishing and erosion in dense arrays must be controlled to <50 nm. **HDP vs FCVD Trade-off** FCVD (flowable CVD) is an alternative for gap fill: precursor liquid condenses and flows, filling voids via capillary action. FCVD is slower (~20-50 nm/min vs 100+ nm/min for HDP) but is gentler on topography and causes less damage. Modern nodes often use hybrid: O₃-TEOS SACVD for bulk fill, HDP-CVD for void elimination and planarization. **Summary** HDP-CVD is a transformational technology, enabling void-free gap-fill at aggressive aspect ratios. Despite challenges (damage, stress control), HDP-CVD remains the preferred method for STI and critical gap-fill applications across all technology nodes.