in situ clean
**In-Situ Cleaning for Surface Preparation** is the **suite of gas-phase and plasma-based cleaning techniques performed inside the deposition or etch chamber (or cluster tool) immediately before the next process step without exposing the wafer to atmosphere** — eliminating the native oxide regrowth, particle contamination, and moisture adsorption that occur during wafer transfer between tools, essential for creating atomically clean interfaces at the most critical junctions in CMOS fabrication.
**Why In-Situ Clean**
- Ex-situ (wet clean): Wafer cleaned in wet bench → transferred through cleanroom air → arrives at deposition tool.
- Air exposure: Even 2 minutes → 0.5-1nm native SiO₂ grows on bare Si surface.
- Queue time: Variable delay between clean and deposition → variable oxide thickness → Vt variation.
- In-situ: Clean and deposit in same vacuum environment → zero air exposure → pristine interface.
**In-Situ Clean Methods**
| Method | Chemistry | Temperature | Removes | Application |
|--------|----------|------------|---------|-------------|
| HF vapor | Anhydrous HF or HF/NH₃ | 25-100°C | Native SiO₂, metal oxides | Pre-epi, pre-gate |
| H₂ bake | H₂ at high temperature | 700-900°C | Native SiO₂ (reduces to SiO↑) | Pre-epi |
| H₂ plasma | Remote H₂ plasma | 200-400°C | Oxides, carbon | Low thermal budget |
| Ar sputter | Ar⁺ ion bombardment | RT | Any surface layer | Pre-metal deposition |
| NH₃ plasma | Remote NH₃ plasma | 200-400°C | Native oxide, reduce metals | Pre-ALD |
| SiCoNi | NH₃ + NF₃ plasma | 30-80°C + anneal | SiO₂ (self-limiting) | Pre-epi, pre-contact |
**H₂ Bake for Pre-Epitaxy**
```
Process sequence (in epi chamber):
1. Load wafer into epi chamber (brief air exposure during load)
2. H₂ bake at 800-900°C × 60s
Si + SiO₂ → 2 SiO↑ (volatile, desorbs)
Result: Oxide-free Si surface
3. Cool to epi temperature (550-650°C)
4. Begin epitaxial growth immediately
→ Atomically clean Si surface → perfect epitaxial interface
```
**HF Vapor Clean**
- Anhydrous HF + IPA or H₂O catalyst.
- SiO₂ + 6HF → H₂SiF₆ + 2H₂O (gaseous products).
- Self-limiting: Only removes oxide, does not etch Si.
- Leaves H-terminated Si surface → stable for several minutes.
- Advantage: Low temperature → compatible with thermal budget constraints.
**Cluster Tool Integration**
```
[Load Lock] → [Clean Chamber] → [Transfer] → [Deposition Chamber]
Wafer in HF vapor or Vacuum ALD, CVD, or PVD
SiCoNi clean transfer (no air exposure)
```
- Cluster tool: Multiple process chambers connected by vacuum transfer.
- Wafer never sees air between clean and deposition.
- Most critical integrations:
- SiCoNi → epi (pre-epitaxy clean)
- HF vapor → ALD HfO₂ (pre-gate stack)
- Ar sputter → PVD barrier (pre-metallization)
**Impact on Device Performance**
| Interface | With Air Exposure | With In-Situ Clean |
|-----------|------------------|--------------------|
| Si/epi SiGe | 0.5-1nm native oxide → stacking faults | Clean interface → defect-free |
| Si/gate HfO₂ | Variable IL → Vt variation ±30mV | Controlled IL → Vt ±5mV |
| Via bottom/metal | Oxide → high contact R (~100 Ω) | Clean → low contact R (~10 Ω) |
In-situ cleaning is **the interface engineering that transforms semiconductor manufacturing from a sequence of isolated process steps into a seamlessly integrated flow** — by eliminating the uncontrolled native oxide and contamination that accumulates during any atmospheric exposure, in-situ cleans enable the atomically precise interfaces that determine transistor threshold voltage, contact resistance, and epitaxial crystal quality at every advanced CMOS node.