ir drop analysis
**IR drop analysis** calculates the **voltage drop across the on-chip power distribution network** (power grid) caused by resistive losses in the metal wiring — determining how much voltage actually reaches each transistor compared to the nominal supply voltage.
**Why IR Drop Matters**
- The power grid delivers supply voltage (VDD) and ground (VSS) to billions of transistors through a network of metal wires, vias, and bumps.
- Every conductor has resistance ($R$), and when current ($I$) flows, it creates a voltage drop: $V_{drop} = I \times R$.
- Transistors receiving **reduced voltage** (VDD - IR drop) operate **slower** — timing margins shrink.
- If IR drop is excessive, circuits may fail to meet timing or even malfunction completely.
- At advanced nodes with **lower supply voltages** (0.5–0.8V), even a 50mV drop represents **6–10%** of VDD — a critical performance impact.
**Types of IR Drop**
- **Static (Average) IR Drop**: Based on the average current drawn by each block over time. Shows the steady-state voltage distribution. Used for early power grid planning.
- **Dynamic (Transient) IR Drop**: Accounts for instantaneous current surges when many circuits switch simultaneously. Often much larger than static IR drop. Occurs during clock edges and burst activity.
**What IR Drop Analysis Reveals**
- **Voltage Maps**: Color-coded maps showing the delivered voltage at every point on the die. Red zones indicate critical IR drop.
- **Hot Spots**: Locations where IR drop exceeds the design limit — typically in high-activity blocks far from power bumps.
- **Worst-Case Scenarios**: Dynamic analysis identifies which switching patterns cause the largest instantaneous voltage dips.
- **EM Risk Correlation**: High-current paths identified in IR drop analysis often correspond to electromigration risk areas.
**Factors Affecting IR Drop**
- **Power Grid Density**: More metal allocated to power → lower resistance → less IR drop. But consumes routing resources.
- **Bump/Pad Placement**: Power bumps closer to high-activity blocks reduce IR drop.
- **Decoupling Capacitors**: On-die decaps help with dynamic IR drop by supplying local charge during current surges.
- **Metal Layer Allocation**: Thicker top metals with lower sheet resistance carry global power distribution.
- **Current Distribution**: Balanced current draw across the die reduces worst-case IR drop.
**Analysis Workflow**
1. **Extract** the power grid (metal geometry, resistance, via resistance) from the physical layout.
2. **Apply** current sources at each instance (standard cell, memory block) based on power estimates or activity-based power analysis.
3. **Solve** the resistive network (and RC network for dynamic analysis) to compute node voltages.
4. **Check** voltage at each instance against the minimum operating voltage.
5. **Fix** violations by adding metal straps, power bumps, or redistribution.
IR drop analysis is **essential for power integrity** — as supply voltages shrink and power density increases at each technology node, ensuring adequate voltage delivery becomes one of the most challenging aspects of physical design.