lamella preparation
**Lamella preparation** is the **process of creating an ultra-thin specimen slice (<100 nm thick) from a specific location in a semiconductor device for examination in a Transmission Electron Microscope** — the critical sample preparation step that determines TEM image quality, as the specimen must be thin enough for electron transmission while preserving the exact structure and chemistry of the region being investigated.
**What Is a Lamella?**
- **Definition**: A thin, flat, electron-transparent specimen typically 30-100 nm thick, 5-15 µm wide, and 5-10 µm tall — extracted from a precise location in a semiconductor device using FIB milling and micromanipulation.
- **Thickness Requirement**: Must be thin enough for electrons at 80-300 kV to transmit through the specimen — typically <100 nm for general imaging, <30 nm for high-resolution STEM/EELS.
- **Site Specificity**: The critical advantage of FIB-prepared lamellae — the specimen comes from the exact location of interest (defect site, specific transistor, interface of concern).
**Why Lamella Preparation Matters**
- **TEM Analysis Enabler**: Without properly prepared lamellae, TEM analysis of specific device structures is impossible — lamella quality directly determines analytical data quality.
- **Site-Specific Analysis**: FIB lamella preparation is the only method that reliably targets specific devices, defects, or structures within a semiconductor chip.
- **Atomic-Resolution Imaging**: The thinnest lamellae (<30 nm) enable atomic-resolution imaging in aberration-corrected STEM — revealing individual atomic columns and interfaces.
- **Damage Minimization**: Proper preparation techniques minimize FIB-induced damage (amorphization, gallium implantation) that can obscure the true specimen structure.
**FIB Lamella Preparation Process**
- **Step 1 — Site Marking**: Using SEM navigation, locate and mark the exact target area based on failure analysis data, defect coordinates, or process monitoring results.
- **Step 2 — Protective Cap**: Deposit 1-3 µm of Pt or C over the target area using electron beam (EBID) then ion beam (IBID) — protecting the surface from FIB damage.
- **Step 3 — Bulk Trenching**: Mill large trenches on both sides of the target using high FIB current (5-30 nA) — creating a thick slab (~1-2 µm).
- **Step 4 — Undercut and Release**: Mill the bottom and one side to free the lamella — leaving it attached by a small bridge for lift-out.
- **Step 5 — Lift-Out**: Use an in-situ micromanipulator (OmniProbe, EasyLift) to attach to the lamella, cut the bridge, and transfer to a TEM grid.
- **Step 6 — Thinning**: Progressively thin the lamella from both sides using decreasing FIB currents (1 nA → 100 pA → 30 pA) — achieving final thickness of 30-80 nm.
- **Step 7 — Final Polish**: Low-voltage (2-5 kV) ion polishing removes the amorphized surface layer — restoring crystalline quality for high-resolution imaging.
**Quality Metrics**
| Parameter | Target | Impact |
|-----------|--------|--------|
| Thickness | 30-80 nm | Determines resolution, contrast |
| Uniformity | ±10 nm variation | Even image quality across lamella |
| Amorphous damage | <2 nm per side | Preserves crystalline structure |
| Curtaining | Minimal | Prevents thickness artifacts |
| Ga implantation | Minimized | Avoids chemistry artifacts |
Lamella preparation is **the make-or-break step of semiconductor TEM analysis** — the quality of every atomic-resolution image, every composition map, and every interface analysis depends entirely on the skill and care invested in preparing an electron-transparent specimen that faithfully represents the actual device structure.