latchup current

**Latchup Current** refers to the **abnormally high supply current drawn by a CMOS IC when latchup has been triggered** — caused by the parasitic PNPN (SCR) structure conducting heavily from VDD to GND through the substrate. **What Is Latchup Current?** - **Normal $I_{DD}$**: Milliamps (typical CMOS operation). - **Latchup $I_{DD}$**: Hundreds of milliamps to amps (parasitic SCR ON). - **Holding Current ($I_h$)**: The minimum current needed to sustain the latchup state. Below $I_h$, the SCR turns off. - **Recovery**: Must cycle power (drop below $I_h$) to exit latchup. **Why It Matters** - **Thermal Damage**: High latchup current causes localized heating -> junction melting -> permanent damage. - **Detection**: Monitoring $I_{DD}$ is the simplest way to detect latchup (sudden current spike). - **Supply Design**: Current limiting on VDD can prevent destruction if latchup occurs. **Latchup Current** is **the signature of a parasitic thyristor in action** — the telltale surge that indicates the chip has entered a potentially destructive feedback state.