Lead Attachment
# Lead Attachment: Why Indium's Softness Protects the Wafer and Its Low Melting Point Haunts the Finished Device
Lead attachment is the last step in the alloy-junction process flow, and it closes a loop the very first furnace-alloying step opened: the same indium eutectic that made the whole process possible at a furnace-friendly 156°C also sets a permanent, unavoidable ceiling on how hot the finished transistor can ever safely get again. Bonding the fine emitter and collector wires onto the regrown indium dots, and a separate base lead onto the bulk n-type edge, has to happen gently enough not to crack a wafer that wafer lapping deliberately thinned down to the punch-through-and-series-resistance limit — and it has to happen at a temperature low enough never to threaten the same eutectic bond the device's entire active structure is built from.
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## 1. Why Bonding Force Is Not a Free Variable Here
Wire bonding ordinarily relies on some combination of applied force, ultrasonic energy, and heat to make a reliable metallurgical joint — and all three of those inputs translate, to some degree, into mechanical stress on whatever the bond is being made against. The wafer-lapping step thinned this wafer specifically to sit as close as safely possible to the punch-through floor while minimizing series resistance and thermal mass, which means it is also, for exactly that same reason, thinner and more fragile than it would be if lapping had left extra margin. Indium's exceptional softness is what makes lead attachment compatible with that already-thinned wafer: a bond that can form under light force, with the indium itself absorbing most of the mechanical deformation rather than transmitting it through to the substrate, is the only kind of bond this process can safely make without undoing the careful thinness wafer lapping already established.
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## 2. Why the Base Lead Bond Follows a Different Rule
The base lead is not bonded to a regrown indium dot — it attaches to the bulk n-type germanium edge, the same role the base stud played in the point-contact transistor's own process flow, and the same ohmic-contact requirement applies for the same reason: a third terminal that behaves like a rectifying junction would fight the emitter and collector's own bias conditions. Just as the point-contact transistor's base stud used antimony-doped solder to raise the local donor concentration high enough to push conduction into the tunneling regime rather than the thermionic-emission regime, the alloy-junction's base lead attachment uses a similarly doped solder or braze alloy at the n-type edge — the identical physics, $\rho_c\propto\exp\!\big(2\phi_B/\hbar\cdot\sqrt{\varepsilon_s m^*/N_D}\big)$, reappearing at a different step of a different process family, because the underlying constraint — the base terminal must stay a plain resistor, not a second device — never changed between the two process lineages at all.
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## 3. The Eutectic Ceiling: A Permanent Limit Set Before Lead Attachment Even Happens
Furnace alloying worked because indium and germanium form a eutectic at a comparatively low $156\,^\circ\text{C}$, letting the dissolution-and-regrowth step run at a furnace temperature far below germanium's own $938\,^\circ\text{C}$ melting point. That same low eutectic temperature, once the device is finished, becomes a hard upper bound on everything that happens to it afterward: any subsequent soldering step (mounting the finished transistor onto a circuit board), any storage condition, and any operating temperature the device sees in service must all stay safely below $156\,^\circ\text{C}$, or the regrown indium-germanium region itself risks re-melting, degrading the junction it took the entire alloying step to build in the first place. Lead attachment is deliberately performed at a temperature well below this ceiling for exactly this reason — it is the last opportunity in the manufacturing flow to add thermal budget to the device, and every bit of margin left unused here is margin the device gets to keep for its actual service life.
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## Lead Attachment's Place in the Alloy-Junction Process Flow
| What Lead Attachment Must Respect | Set By Which Earlier Step |
|---|---|
| Low bonding force | Wafer lapping's thinness (punch-through floor / series-resistance trade-off) |
| Ohmic, non-rectifying base contact | Same requirement as the point-contact transistor's base stud |
| Temperature ceiling for every bond made here | Furnace alloying's own 156°C In-Ge eutectic |
| No disturbance to the graded regrown region | Controlled regrowth's epitaxial continuity and doping gradient |
Read lead attachment through a *last chance to not undo everything* lens rather than a *final assembly* lens: by this point in the process flow, the device's electrical identity is already fully formed — lead attachment's only job is to connect to it without cracking the wafer lapping thinned, without rectifying where the base lead should be a plain resistor, and without ever approaching the one temperature the entire alloying step depended on crossing safely just a few steps earlier.