liberty format
**Liberty format** (also called **.lib**) is the **industry-standard file format** for describing the electrical characteristics of standard cells, I/O pads, and macro blocks — providing the timing, power, and other data that synthesis, place-and-route, and static timing analysis tools use to implement and verify digital designs.
**What Liberty Files Contain**
- **Cell Definitions**: Each cell (AND2, INV, DFFQ, etc.) is defined with:
- Pin declarations (input, output, inout)
- Pin functions (Boolean logic function)
- Pin capacitance values
- Timing arcs (every input→output delay path)
- Power data (switching, internal, leakage)
- **Timing Information**:
- **Cell Delay**: Propagation delay from each input to each output, stored as 2D lookup tables indexed by input transition time and output load capacitance.
- **Output Transition**: Rise/fall time at the output, also 2D tables.
- **Setup/Hold Time**: Sequential cell (flip-flop, latch) timing constraints — the minimum time data must be stable before/after the clock edge.
- **Clock-to-Q Delay**: Output delay of a flip-flop after the clock edge.
- **Power Information**:
- **Dynamic Power**: Switching energy per transition for each arc.
- **Internal Power**: Short-circuit power during switching.
- **Leakage Power**: Static power for each input state combination.
- **Operating Conditions**: The PVT corner (process, voltage, temperature) for which the data applies.
**Liberty File Organization**
```
library (my_lib_ss_0p75v_125c) {
technology (cmos) ;
delay_model : table_lookup ;
nom_voltage : 0.75 ;
nom_temperature : 125 ;
cell (INV_X1) {
pin (A) { direction: input; capacitance: 0.5; }
pin (Y) { direction: output; function: "!A";
timing () {
related_pin: "A";
cell_rise (lut_7x7) { index_1(...); index_2(...); values(...); }
cell_fall (lut_7x7) { ... }
}
}
}
}
```
**Liberty Variants**
- **NLDM (Non-Linear Delay Model)**: Basic Liberty — 2D delay tables. Sufficient for most digital design.
- **CCS (Composite Current Source)**: Adds current waveform data for more accurate delay computation. Used at advanced nodes.
- **ECSM (Effective Current Source Model)**: Cadence's alternative advanced model.
- **LVF (Liberty Variation Format)**: Extension that adds per-cell variation data for POCV analysis.
**One Library, Many Corners**
- A separate Liberty file is generated for each PVT corner (SS/TT/FF × voltage × temperature).
- A typical design uses **10–50+ Liberty files** across all corners for MCMM analysis.
Liberty format is the **universal language** between library providers and EDA tools — it is the single most important data format in the digital design flow.