Low Dropout Regulator
A low-dropout regulator holds an output voltage steady by burning off the difference between a higher input rail and the target output across a single series pass transistor, and it earns the "low-dropout" name specifically because that pass device can stay in its linear region with only a few hundred millivolts of headroom instead of the volt or more older linear regulators needed — the tradeoff is that every bit of that dropped voltage times the load current turns directly into heat, so an LDO is never the efficiency choice, it's the noise-and-simplicity choice.
Efficiency is mathematically capped by the voltage ratio, not by design quality. Because an LDO is a series voltage divider implemented with a transistor instead of a resistor, its best-case efficiency is simply Vout divided by Vin regardless of how well it's engineered — stepping 5 volts down to 3.3 volts tops out around 66% efficient, and stepping 12 volts down to 1.8 volts wastes most of the input power as heat, which is exactly why buck converters take over whenever the input-to-output gap is large and current is significant, while LDOs stay competitive only when that gap is small.
Noise performance, not efficiency, is the entire reason LDOs still exist next to switching regulators. A buck converter's switching action inherently injects ripple and EMI at its switching frequency into the output rail, and even with good filtering some of that noise reaches sensitive loads; an LDO has no switching element at all, so its output noise is set only by the error amplifier and reference noise, routinely reaching tens of microvolts RMS — which is why PLLs, VCOs, high-resolution ADCs, and RF front ends almost always get their final supply rail from an LDO even when a switching regulator did the bulk conversion upstream, a two-stage power architecture used throughout commercial RF and mixed-signal ICs.
PSRR at the frequencies that matter is a specification fight manufacturers compete on directly. Power supply rejection ratio measures how well an LDO blocks noise already present on its input rail from reaching the output, and because that rejection naturally degrades at higher frequencies as the error amplifier's loop gain rolls off, parts from Texas Instruments, Analog Devices, and Microchip differentiate themselves specifically on PSRR numbers in the 100 kHz to several-megahertz range — exactly where switching-regulator noise and digital-clock harmonics tend to live, making PSRR-at-frequency a more meaningful spec than the headline PSRR-at-DC number most datasheets lead with.
Thermal budget, not control-loop stability, is usually what actually limits an LDO design. Because dissipated power scales directly with both the voltage drop and the load current, a design team sizing an LDO has to check (Vin minus Vout) times Iload against the package's thermal resistance and worst-case ambient temperature before anything else — a surface-mount LDO package can usually dissipate only a few hundred milliwatts to a couple watts before it needs a heatsink or a larger package, which is why high-current rails route through a switching pre-regulator and only the final low-current, noise-sensitive stage gets an LDO.
Read a low-dropout regulator through a *cleanliness-bought-with-heat* lens rather than an *efficiency* lens: it never tries to recover the energy in the voltage gap it removes, it simply dissipates that gap as heat in exchange for a continuous, switching-free output — which is exactly the property that makes it the right final-stage choice for PLLs, ADCs, and RF rails even in systems where a switching regulator already did the heavy lifting upstream.