Low Power
Low power is the property of doing useful electronic work while drawing very little electrical energy, and it is one of the two reasons, along with size, that transistors displaced vacuum tubes. Power is the rate of energy use, measured in watts, and for a circuit it is the supply voltage times the current drawn (P = V × I). A device that needs milliwatts instead of watts can run for days on a small battery, can be packed by the million without melting itself, and can be placed in a pocket, an ear, a wristwatch or a sensor on a bridge. Nearly every modern design decision about processors, phones and data-center accelerators is, at bottom, a negotiation over power.
Transistors beat tubes first because a tube must be kept hot and a transistor does not. A vacuum tube works by boiling electrons off a heated cathode, so every tube needs a heater filament glowing continuously, whether or not it is amplifying anything. A typical small receiving tube spent a watt or two on its heater alone, plus the plate power on top, and a computer with thousands of them paid this tax around the clock; ENIAC, with about 17,468 tubes, drew on the order of 150 kilowatts. A transistor conducts through a solid crystal at room temperature, needs no warm-up, and can work at fractions of a volt and microamps to milliamps, putting a small signal stage in the milliwatt range or below. That difference turned portable radios, pacemakers and hearing aids from curiosities into products, and it lowered the cooling and wiring burden of every large machine.
CMOS made the idle state nearly free, which is why it conquered digital logic. Complementary metal-oxide-semiconductor logic, worked out by Frank Wanlass at Fairchild Semiconductor in 1963 (with Chih-Tang Sah), pairs an n-type and a p-type transistor so that, in a steady state, one of the two is always off and no direct path exists from the supply to ground. A gate holding a 0 or a 1 therefore draws almost no static power; current flows mainly during a switch, when the output capacitance is charged or discharged. Earlier logic families such as bipolar TTL burned power continuously in at least one state. CMOS was slow to take over because it was slower and harder to manufacture than the alternatives, but as chips grew to billions of gates, an idle circuit costing nearly nothing became decisive.
Dynamic power follows a simple plain-text rule: P = α × C × V^2 × f. Here C is the capacitance being switched, V the supply voltage, f the clock frequency, and α the activity factor, the fraction of nodes that actually toggle each cycle (the original formula is often written P = C × V^2 × f with α folded in). The square on voltage is the lever: halving the supply cuts dynamic power to about a quarter, which is why core voltages fell from 5 volts in the TTL-compatible era to roughly 1 volt or less today. Designers also turn down frequency, shut off the clock to idle blocks (clock gating), cut the supply to unused regions entirely (power gating), and scale voltage and frequency together as workload changes, a technique built into every phone and laptop processor.
Leakage and the power wall ended the free ride around 2004-2005. For decades, Robert Dennard's 1974 scaling rules let each smaller generation run faster at constant power density, because voltage dropped along with size. As transistors shrank, though, the threshold voltage could not follow, and carriers started leaking through thin gate oxides and across nearly-off channels even when no one was switching them; static power returned as a major share of the budget. Around 2004-2005 clock speeds of mainstream processors stalled at a few gigahertz, and Intel cancelled planned higher-clock designs. The industry's answer was multicore processors, wider parallelism, new gate stacks with high-k dielectrics, and three-dimensional transistors such as FinFETs, trading raw clock speed for more work per joule.
The most common misconceptions are that CMOS uses no power at all and that low power only matters for batteries. CMOS uses almost none when idle, but a processor running flat out at several gigahertz can still dissipate over a hundred watts, because billions of transistors each switch billions of times a second. Low power also matters in plugged-in machines: a data center's electricity bill and its cooling capacity limit how many accelerators can be installed, and the power each chip must shed becomes a heat problem. Energy per operation, not clock speed, is now the figure of merit, and phrases like performance per watt dominate processor marketing for exactly this reason.
Low power shapes everyday hardware from a wristband to a language-model accelerator. Microcontrollers sleep at microamp currents and wake on a timer for a few milliseconds, letting a coin cell last for years. Phones use heterogeneous cores, big ones for bursts and small ones for background tasks. AI hardware leans on lower-precision arithmetic, such as 8-bit or even 4-bit numbers, because narrower datapaths mean less capacitance switched per operation, and some research chips compute with analog currents to avoid moving data at all. Every one of these techniques is a variation on the same three terms: less capacitance, lower voltage, fewer switching events.
Read low power as the quiet constraint that explains why the transistor won, why CMOS became the default, and why modern chips are limited less by how fast a switch can flip than by how much energy each flip costs and how much of it can be carried away as heat.